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SI5017-BM

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24P25-P26
Si5017
16 Rev. 1.2
Figure 10. Input Termination for REFCLK (ac coupled)
Figure 11. Input Termination for DIN (ac coupled)
Clock source
Si5017
0.1 µF
0.1 µF
Zo = 50 Ω
Zo = 50 Ω
RFCLK +
RFCLK –
2.5 kΩ
2.5 kΩ10 kΩ
10 kΩ
100 Ω
GND
2.5 V (±5%)
TIA
Si5017
0.1 µF
0.1 µF
Zo = 50 Ω
Zo = 50 Ω
DIN+
DIN–
5 kΩ50 Ω
GND
7.5 kΩ50 Ω
2.5 V (±5%)
Si5017
Rev. 1.2 17
Figure 12. Single-Ended Input Termination for REFCLK (ac coupled)
Figure 13. Single-Ended Input Termination for DIN (ac coupled)
0.1 µF
Clock
source
Si5017
0.1 µFZo = 50Ω
RFCLK +
RFCLK –
2.5 kΩ
2.5 kΩ10 kΩ
10 kΩ
50 Ω
GND
2.5 V (±5%)
Si5017
0.1 µF Zo = 50 Ω
DIN+
DIN–
5 kΩ50 Ω
GND
7.5 kΩ50 Ω
Ω100
0.1 µF
Signal
source
2.5 V
(±5%)
Si5017
18 Rev. 1.2
Differential Output Circuitry
The Si5017 utilizes a CML architecture to output both the recovered clock (CLKOUT) and data (DOUT). An
example of output termination with ac coupling is shown in Figure 14. In applications in which direct dc coupling is
possible, the 0.1 µF capacitors may be omitted. The differential peak-to-peak voltage swing of the CML
architecture is specified in Table 2 on page 7.
Figure 14. Output Termination for DOUT and CLKOUT (ac coupled)
DOUT–,
CLKOUT–
50 Ω
50 Ω
0.1 µF
0.1 µF
Zo = 50 Ω
Zo = 50 Ω
Si5017 VDD
VDD
100 Ω
100 Ω
2.5 V (±5%)
DOUT+,
CLKOUT+
2.5 V (±5%)
P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24P25-P26

SI5017-BM

Mfr. #:
Buy SI5017-BM
Manufacturer:
Silicon Labs
Description:
IC CLOCK/DATA RECOVERY 28MLP
Lifecycle:
New from this manufacturer.
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