LTC3300-2
10
33002f
For more information www.linear.com/LTC3300-2
PIN FUNCTIONS
C1, C2, C3, C4, C5, C6 (Pins 24, 27, 30, 33, 36, 39):
C1 through C6 connect to the positive terminals of bat-
tery cells
1
through 6. Connect the negative terminal of
battery cell 1 to V
.
BOOST
+
(Pin 40): Boost
+
Pin. Connects to the anode of
the external flying capacitor used for generating sufficient
gate drive necessary for balancing the topmost battery cell
in a given LTC3300-2 sub-stack. A Schottky diode from
C6 to BOOST
+
is needed as well. Alternately, the BOOST
+
pin can connect to one cell up in the above sub-stack (if
present). This pin is effectively C7. (Note: “Sub-stack” refers
to the 3-6 battery cells connected locally to an individual
LTC3300-2 as part of a larger stack.)
BOOST
(Pin 41): Boost
Pin. Connects to the cathode of
the external flying capacitor used for generating sufficient
gate drive necessary for balancing the topmost battery
cell in a given LTC3300-2 sub-stack. Alternately, if the
BOOST
+
pin connects to the next higher cell in the above
sub-stack (if present), this pin is a no connect.
BOOST (Pin 42): Enable Boost Pin. Connect BOOST to V
REG
to enable the boosted gate drive needed for balancing the
top cell
in a given LTC3300-2 sub-stack. If the BOOST
+
pin
can be connected to the next cell up in the stack (i.e., C1
of the next LTC3300-2 in the stack), then BOOST should
be tied to V
and BOOST
no connected. This pin must
be tied to either V
REG
or V
.
A0, A1, A2, A3, A4 (Pins 43, 44, 45, 46, 47): Address
Inputs. The state of the address pins (V
REG
= 1, V
= 0)
determines the LTC3300-2 address. These pins must be
tied to either V
REG
or V
. See Serial Port in the Operation
section.
V
REG
(Pin 48): Linear Voltage Regulator Output. This 4.8V
output should be bypassed with aF or larger capacitor
to V
. The V
REG
pin is capable of supplying up to 40mA
to internal and external loads. The V
REG
pin does not sink
current.
LTC3300-2
11
33002f
For more information www.linear.com/LTC3300-2
BLOCK DIAGRAM
+
+
BOOST
+
BOOST
GATE DRIVE
GENERATOR
6-CELL
SYNCHRONOUS
FLYBACK
CONTROLLER
BALANCER
C6
C6
C5
DATA
12
STATUS
12
C5
50mV/0
0/50mV
V
REG
V
+
39
BOOST
BOOST
V
REG
SD
C6
40mA
MAX
V
POR
4.8V
42
41
G6P
38
I6P
37
I6S
2
G6S
PINS 3 TO 10,
25 TO 36
1
BALANCER
CONTROLLER
+
C2
C1
V
50mV/0
0/50mV
V
REG
V
+
24
G1P
23
I1P
22
I1S
12
G1S
11
20
BALANCER
CONTROLLER
2
ACTIVE
2
MAX ON-TIME
VOLT-SEC
CLAMPS
THERMAL
SHUTDOWN
BOOST
+
40
V
RTONS
13
CTRL
15
V
WDT
16
CSBI
17
SCKI
18
SDI
19
SDO
43
A0
45
A2
47
44
46
A4
A1
A3
RESET
RTONP
33002 BD
14
V
5.6V
1.2V
R
TONS
V
21
EXPOSED
PAD
49
LEVEL-SHIFTING
SERIAL
INTERFACE
V
REG
48
VOLTAGE
REGULATOR
CRC/RCRC
PACKET ERROR
CHECKING
16
WATCHDOG
TIMER
5
ADDRESS
LTC3300-2
12
33002f
For more information www.linear.com/LTC3300-2
TIMING DIAGRAM
t
6
t
7
t
3
t
5
t
4
t
1
t
8
t
2
SCKI
SDI
CSBI
SDO
33002 TD
Timing Diagram of the Serial Interface

LTC3300IUK-2#TRPBF

Mfr. #:
Manufacturer:
Analog Devices / Linear Technology
Description:
Battery Management Addressable Hi Eff Bi-dir Multicell Bat
Lifecycle:
New from this manufacturer.
Delivery:
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