REV. 0
AD5334/AD5335/AD5336/AD5344
10
OFFSET ERROR DRIFT
This is a measure of the change in Offset Error with changes in
temperature. It is expressed in (ppm of full-scale range)/°C.
GAIN ERROR DRIFT
This is a measure of the change in Gain Error with changes in
temperature. It is expressed in (ppm of full-scale range)/°C.
DC POWER-SUPPLY REJECTION RATIO (PSRR)
This indicates how the output of the DAC is affected by changes in
the supply voltage. PSRR is the ratio of the change in V
OUT
to a
change in V
DD
for full-scale output of the DAC. It is measured
in dBs. V
REF
is held at 2 V and V
DD
is varied ±10%.
DC CROSSTALK
This is the dc change in the output level of one DAC at mid-
scale in response to a full-scale code change (all 0s to all 1s and
vice versa) and output change of another DAC. It is expressed
in µV.
REFERENCE FEEDTHROUGH
This is the ratio of the amplitude of the signal at the DAC output
to the reference input when the DAC output is not being updated
(i.e., LDAC is high). It is expressed in dBs.
CHANNEL-TO-CHANNEL ISOLATION
This is a ratio of the amplitude of the signal at the output of one
DAC to a sine wave on the reference inputs of the other DACs.
It is measured by grounding one V
REF
pin and applying a 10 kHz,
4 V peak-to-peak sine wave to the other V
REF
pins. It is expressed
in dBs.
MAJOR-CODE TRANSITION GLITCH ENERGY
Major-Code Transition Glitch Energy is the energy of the
impulse injected into the analog output when the DAC changes
state. It is normally specified as the area of the glitch in nV secs
and is measured when the digital code is changed by 1 LSB at
the major carry transition (011 . . . 11 to 100 . . . 00 or 100 . . . 00
to 011 . . . 11).
DIGITAL FEEDTHROUGH
Digital Feedthrough is a measure of the impulse injected into
the analog output of the DAC from the digital input pins of the
device but is measured when the DAC is not being written to
(CS held high). It is specified in nV-secs and is measured with a
full-scale change on the digital input pins, i.e. from all 0s to all
1s and vice versa.
DIGITAL CROSSTALK
This is the glitch impulse transferred to the output of one DAC
at midscale in response to a full-scale code change (all 0s to all
1s and vice versa) in the input register of another DAC. It is
expressed in nV secs.
ANALOG CROSSTALK
This is the glitch impulse transferred to the output of one DAC
due to a change in the output of another DAC. It is measured
by loading one of the input registers with a full-scale code change
(all 0s to all 1s and vice versa) while keeping LDAC high. Then
pulse LDAC low and monitor the output of the DAC whose
digital code was not changed. The area of the glitch is expressed
in nV secs.
DAC-TO-DAC CROSSTALK
This is the glitch impulse transferred to the output of one DAC
due to a digital code change and subsequent output change of
another DAC. This includes both digital and analog crosstalk. It
is measured by loading one of the DACs with a full-scale code
change (all 0s to all 1s and vice versa) with the LDAC pin set
low and monitoring the output of another DAC. The energy of
the glitch is expressed in nV secs.
MULTIPLYING BANDWIDTH
The amplifiers within the DAC have a finite bandwidth. The
Multiplying Bandwidth is a measure of this. A sine wave on the
reference (with full-scale code loaded to the DAC) appears on
the output. The Multiplying Bandwidth is the frequency at which
the output amplitude falls to 3 dB below the input.
TOTAL HARMONIC DISTORTION
This is the difference between an ideal sine wave and its attenuated
version using the DAC. The sine wave is used as the reference
for the DAC and the THD is a measure of the harmonics present
on the DAC output. It is measured in dBs.
REV. 0
AD5334/AD5335/AD5336/AD5344
11
Typical Performance Characteristics
CODE
INL ERROR – LSBs
1.0
0.5
–1.0
0
50 250100 150 200
0
–0.5
T
A
= 25
C
V
DD
= 5V
Figure 5. AD5334 Typical INL Plot
CODE
DNL ERROR LSBs
050 250100 150 200
0.1
0.2
0.3
0.3
0.1
0.2
0
T
A
= 25
C
V
DD
= 5V
Figure 8. AD5334 Typical DNL Plot
V
REF
V
ERROR LSBs
0.5
0.25
0.5
01 5234
0
0.25
V
DD
= 5V
T
A
= 25C
MAX INL
MAX DNL
MIN DNL
MIN INL
Figure 11. AD5334 INL and DNL
Error vs. V
REF
CODE
INL ERROR LSBs
3
0
200 1000
400 600 800
0
1
2
3
2
1
T
A
= 25
C
V
DD
= 5V
Figure 6. AD5335 Typical INL Plot
CODE
DNL ERROR LSBs
0.4
0.4
600400
800 1000
0
0.6
0.6
0.2
0.2
T
A
= 25C
V
DD
= 5V
2000
Figure 9. AD5335 Typical DNL Plot
TEMPERATURE
C
ERROR LSBs
0.5
0.2
0.5
40 0 40
0
0.2
V
DD
= 5V
V
REF
= 2V
MAX INL
80 120
0.4
0.3
0.1
0.1
0.3
0.4
MAX DNL
MIN INL
MIN DNL
Figure 12. AD5334 INL Error and
DNL Error vs. Temperature
CODE
INL ERROR LSBs
12
0
4
8
8
4
0 4000
1000 2000 3000
12
T
A
= 25C
V
DD
= 5V
Figure 7. AD5336 Typical INL Plot
CODE
DNL ERROR LSBs
0.5
2000
3000 4000
0
1
1
0.5
T
A
= 25
C
V
DD
= 5V
10000
Figure 10. AD5336 Typical DNL Plot
GAIN ERROR
TEMPERATURE C
ERROR %
1
0.5
1
40 0 40
0
0.5
V
DD
= 5V
V
REF
= 2V
OFFSET ERROR
80 120
Figure 13. AD5334 Offset Error
and Gain Error vs. Temperature
REV. 0
AD5334/AD5335/AD5336/AD5344
12
GAIN ERROR
V
DD
Volts
ERROR %
0.2
0.6
01 3
0
0.4
T
A
= 25C
V
REF
= 2V
46
0.5
0.3
0.2
0.1
0.1
25
OFFSET ERROR
Figure 14. Offset Error and Gain
Error vs. V
DD
0
T
A
= 25
C
I
DD
A
V
DD
V
2.5 3.0 3.5 4.0 4.5 5.0 5.5
100
200
300
400
500
600
Figure 17. Supply Current vs. Supply
Voltage
V
OUT
A
5µs
CH1
CH2
LDAC
T
A
= 25C
V
DD
= 5V
V
REF
= 5V
CH1 1V, CH2 5V, TIME BASE= 1s/DIV
Figure 20. Half-Scale Settling (1/4 to
3/4 Scale Code Change)
5V SOURCE
SINK/SOURCE CURRENT mA
V
OUT
Volts
5
0
01 3
4
46
1
2
3
25
3V SOURCE
3V SINK
5V SINK
Figure 15. V
OUT
Source and Sink
Current Capability
0
2.5
I
DD
A
V
DD
V
3.0 3.5 4.0 4.5 5.0 5.5
0.1
0.2
0.3
0.4
0.5
T
A
= 25
C
Figure 18. Power-Down Current vs.
Supply Voltage
V
DD
CH1
CH2
V
OUT
A
T
A
= 25C
V
DD
= 5V
V
REF
= 2V
CH1 2V, CH2 200mV, TIME BASE = 200s/DIV
Figure 21. Power-On Reset to 0 V
0
ZERO-SCALE FULL SCALE
DAC CODE
I
DD
A
V
DD
= 5.5V
V
DD
= 3.6V
100
200
300
400
500
600
T
A
= 25
C
V
REF
= 2V
Figure 16. Supply Current
vs. DAC Code
V
LOGIC
V
I
DD
A
200
0
0
1
2345
400
600
800
1000
1200
1400
1600
1800
V
DD
= 5V
V
DD
= 3V
Figure 19. Supply Current
vs. Logic Input Voltage
CH1 500mV, CH2 5V, TIME BASE = 1s/DIV
CH1
CH2
T
A
= 25
C
V
DD
= 5V
V
REF
= 2V
V
OUT
A
PD
Figure 22. Exiting Power-Down
to Midscale

AD5336BRU

Mfr. #:
Manufacturer:
Analog Devices Inc.
Description:
Digital to Analog Converters - DAC Quad 10-Bit
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
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