Document Number: 001-65659 Rev. *I Page 10 of 26
CY7C65642
Downstream Port 1
DD–[1] 5 I/O/Z Downstream D– Signal.
DD+[1] 6 I/O/Z Downstream D+ Signal.
AMBER[1]
SPI_CS
46 O(R
DN
)
O(R
DN
)
LED. Driver output for amber LED. port indicator support.
SPI_CS. Can be used as chip select to access external SPI EEPROM.
GREEN[1]
[2]
SPI_SK
FIXED_PORT1
45 O(R
DN
)
O(R
DN
)
I(R
DN
)
LED. Driver output for green LED. Port indicator support.
SPI_SK. Can be used as SPI Clock to access external SPI EEPROM.
FIXED_PORT1. At POR used to set Port1 as non removable port. Refer Pin
Configuration Options on page 15.
OVR#[1] 42 I(R
UP
) Overcurrent Condition Detection Input. Active LOW Overcurrent Condition
Detection Input.
PWR#[1]
I
2
C_SDA
43 O/Z
I/O
Power Switch Driver Output. Default is Active LOW.
I
2
C_SDA. Can be used as I
2
C Data pin, connected with I
2
C EEPROM.
Downstream Port 2
DD–[2] 9 I/O/Z Downstream D– Signal.
DD+[2] 10 I/O/Z Downstream D+ Signal.
AMBER[2]
SPI_MOSI
PWR_PIN_POL
36 O(R
DN
)
O(R
DN
)
I(R
DN
)
LED. Driver output for Amber LED. Port Indicator Support.
SPI_MOSI. Can be used as Data Out to access external SPI EEPROM.
PWR_PIN_POL. Used for power switch enable pin polarity setting. Refer Pin
Configuration Options on page 15.
GREEN[2]
[2]
SPI_MISO
FIXED_PORT2
35 O(R
DN
)
I(R
DN
)
I(R
DN
)
LED. Driver output for Green LED. Port Indicator Support.
SPI_MISO. Can be used as Data In to access external SPI EEPROM.
FIXED_PORT2. At POR used to set Port2 as non removable port. Refer Pin
Configuration Options on page 15.
OVR#[2] 40 I(R
UP
) Overcurrent Condition Detection Input. Active LOW Overcurrent Condition
Detection Input.
PWR#[2] 41 O/Z Power Switch Driver Output. Default is Active LOW
Downstream Port 3
DD–[3] 17 I/O/Z Downstream D– Signal.
DD+[3] 18 I/O/Z Downstream D+ Signal.
AMBER[3]
SET_PORT_NUM2
33 O(R
DN
)
I(R
DN
)
LED. Driver output for Amber LED. Port indicator support.
SET_PORT_NUM2. Used to set port numbering along with SET_PORT_NUM1.
Refer Pin Configuration Options on page 15.
GREEN[3]
FIXED_PORT3
32 O(R
DN
)
I(R
DN
)
LED. Driver output for Green LED. Port indicator support.
FIXED_PORT3. At POR used to set Port3 as non removable port. Refer Pin
Configuration Options on page 15.
OVR#[3] 30 I(R
UP
) Overcurrent Condition Detection Input. Active LOW Overcurrent Condition
Detection Input.
PWR#[3] 31 O/Z Power Switch Driver Output. Default is Active LOW.
Pin Definitions (continued)
48-pin TQFP Package
Pin Name Pin No. Type
[1]
Description
Note
2. Pin-strapping GREEN[1] and GREEN[2] enables proprietary function that may affect the normal functionality of HX2VL. Configuring Port #1 and #2 as non-removable
by pin-strapping should be avoided.
Document Number: 001-65659 Rev. *I Page 11 of 26
CY7C65642
Downstream Port 4
DD–[4] 21 I/O/Z Downstream D– Signal.
DD+[4] 22 I/O/Z Downstream D+ Signal.
AMBER[4]
SET_PORT_NUM1
24 O(R
DN
)
I(R
DN
)
LED. Driver output for Amber LED. Port Indicator Support.
SET_PORT_NUM1. Used to set port numbering along with SET_PORT_NUM2.
Refer “Pin Configuration Options” on page 15
GREEN[4]
FIXED_PORT4
23 O(R
DN
)
I(R
DN
)
LED. Driver output for Green LED. Port Indicator Support.
FIXED_PORT4. At POR used to set Port4 as non removable port. Refer Pin
Configuration Options on page 15.
OVR#[4] 28 I(R
UP
) Overcurrent Condition Detection Input. Active LOW Overcurrent Condition
Detection Input.
PWR#[4] 29 O/Z Power Switch Driver Output. Default is Active LOW.
Note: The alternate function of these pins as LED indicator is not available if the pins are strapped to logic high, unless a separate
circuit is designed to support logic high. Disconnect after 60 ms of power-on reset (POR), when these pins are reconfigured as
outputs.
Pin Definitions (continued)
48-pin TQFP Package
Pin Name Pin No. Type
[1]
Description
Document Number: 001-65659 Rev. *I Page 12 of 26
CY7C65642
Pin Definitions
28-pin QFN Package
Pin Name Pin No. Type
[3]
Description
Power and Clock
VCC_A 5 P V
CC_A
. 3.3 V analog power to the chip.
VCC_A 9 P V
CC_A
. 3.3 V analog power to the chip.
VCC_A 14 P V
CC_A
. 3.3 V analog power to the chip.
VCC_D 21 P V
CC_D
. 3.3 V digital power to the chip.
VCC 27 P V
CC
. 5 V input to the internal regulator; NC if using external regulator
VREG 28 P
V
CC
. 5–3.3 V regulator o/p during internal regulation; 3.3 V i/p if using external
regulator.
XIN 10 I 12-MHz crystal clock input, or 12-MHz clock input
XOUT 11 O 12-MHz Crystal OUT. (NC if external clock is used).
RESET# 17 I
Active LOW Reset. External reset input, default pull high 10k Ohm;
When RESET = low, whole chip is reset to the initial state
SELFPWR 22 I Self Power. Input for selecting self/bus power. 0 is bus powered, 1 is self powered.
GANG 23 I/O
GANG Default is input mode after power-on-reset.
Gang Mode: Input:1 -> Output is 0 for normal operation and 1 for suspend
Individual Mode: Input:0 -> Output is 1 for normal operation and 0 for suspend
Refer to gang / individual power switching modes in Pin Configuration Options on
page 15 for details.
RREF 8 I/O 649- resistor must be connected between RREF and Ground
System Interface
Test
I2C_SCL
18
O(R
DN
)
I/O(R
DN
)
Test. 0: Normal Operation & 1: Chip will be put in test mode
I2C_SCL. I
2
C Clock pin.
PWR#
[4]
I2C_SDA
26 I/O
Power switch driver output. Default is active low
I2C_SDA. I
2
C Data pin.
Notes
3. Pin Types: I = Input, O = Output, P = Power/Ground, Z = High Impedance, R
DN
= Pad internal Pull Down Resistor, R
UP
= Pad internal Pull Up Resistor.
4. PWR#/I2C_SDA can be used as either PWR# or I2C_SDA but not as both. If EEPROM is connected then the pin will act as I2C_SDA, it will not switch to PWR#
mode (as it does in 48-pin TQFP package).

CY7C65642-28LTXC

Mfr. #:
Manufacturer:
Cypress Semiconductor
Description:
USB Interface IC TetraHub Ctrl USB2.0
Lifecycle:
New from this manufacturer.
Delivery:
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