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MT61K256M32JE-14:A

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Figure 12: Voltage Waveform
V
DDQ
V
OH
System noise margin (power/ground,
crosstalk, ISI, attenuation)
V
IH(AC)
V
IL(AC)
V
IH(DC)
V
REF
+ AC noise
V
REF
+ DC error
V
REF
- DC error
V
REF
- AC noise
V
IL(DC)
V
IN(AC)
provides margin
between V
OL(MAX)
and
V
IL(MAX)
V
OL,max
Output
Input
Note:
1. V
REF
, V
IH
, and V
IL
refer to whichever V
REFxx
(V
REFD
, V
REFD2
, V
REFC
, or V
REFC2
) is being used.
Figure 13: Clock Waveform
Maximum clock level
Minimum clock level
V
ID(AC)
V
ID(DC)
V
IX(AC)
V
MP(DC)
CK_t
CK_c
8Gb: 2 Channels x16/x8 GDDR6 SGRAM
Operating Conditions
CCMTD-1412786195-10191
gddr6_sgram_8gb_brief.pdf - Rev. F 8/18 EN
19
Micron Technology, Inc. reserves the right to change products or specifications without notice.
© 2016 Micron Technology, Inc. All rights reserved.
8000 S. Federal Way, P.O. Box 6, Boise, ID 83707-0006, Tel: 208-368-4000
www.micron.com/products/support Sales inquiries: 800-932-4992
Micron and the Micron logo are trademarks of Micron Technology, Inc.
All other trademarks are the property of their respective owners.
This data sheet contains minimum and maximum limits specified over the power supply and temperature range set forth herein.
Although considered final, these specifications are subject to change, as further product development and data characterization some-
times occur.
8Gb: 2 Channels x16/x8 GDDR6 SGRAM
Operating Conditions
CCMTD-1412786195-10191
gddr6_sgram_8gb_brief.pdf - Rev. F 8/18 EN
20
Micron Technology, Inc. reserves the right to change products or specifications without notice.
© 2016 Micron Technology, Inc. All rights reserved.
P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P20

MT61K256M32JE-14:A

Mfr. #:
Buy MT61K256M32JE-14:A
Manufacturer:
Micron
Description:
DRAM GDDR6 8G 256MX32 FBGA
Lifecycle:
New from this manufacturer.
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