SAA7826HL/M1A,557 Datasheet SAA7826HL/E/M1A,55, SAA7826HL/M1A,557 | P46-P48

2003 Oct 01 46

Philips Semiconductors Product speciﬁcation

CD audio decoder, digital servo and ﬁlterless

DAC with integrated pre-amp and laser control

SAA7826

(DAC output

and STATUS pin

control)

0111 XX00 interrupt signal from servo only at STATUS

reset

XX10 status bit from decoder status register or DC

offset information at STATUS pin [see also

new shadow register C (bank 3)]

−

X0XX DAC data normal value reset

X1XX DAC data inverted value −

0XXX left channel ﬁrst at DAC (WCLK normal) reset

1XXX right channel ﬁrst at DAC (WCLK inverted) −

(PLL loop ﬁlter

bandwidth)

see Table 16 −

(PLL

equalization)

1001 0011 PLL loop ﬁlter equalization reset

0001 PLL 30 ns over-equalization −

0010 PLL 15 ns over-equalization −

0100 PLL 15 ns under-equalization −

0101 PLL 30 ns under-equalization −

(EBU output)

1010 XX0X EBU data before concealment −

XX1X EBU data after concealment and fade reset

X0X0 Level II clock accuracy (<1000 ppm) reset

X0X1 Level I clock accuracy (<50 ppm) −

X1X0 Level III clock accuracy (>1000 ppm) −

X1X1 EBU off - output LOW −

0XXX ﬂags in EBU off reset

1XXX ﬂags in EBU on −

(speed control)

1011 X000 standby 1: ‘CD-STOP’ mode reset

X010 standby 2: ‘CD-PAUSE’ mode −

X011 operating mode −

00XX single-speed mode reset

10XX double-speed mode −

(versatile pins

interface and

KILL function)

1100 XXX1 external off-track signal input at V1 −

XXX0 internal off-track signal used (V1 may be

read via status)

reset

XX0X stereo KILL −

XX1X mono KILL reset

00XX V3 = 0 reset

01XX V3 = 1 −

EBU mute

mode select (for

M1 version only

0XXX mute type: soft mute audio (only available at

1× speed)

reset

1XXX mute type: ROM hard mute (available at 1×,

2× and 4× speed)

−

(1)

2003 Oct 01 47

Philips Semiconductors Product speciﬁcation

CD audio decoder, digital servo and ﬁlterless

DAC with integrated pre-amp and laser control

SAA7826

Note

1. The initial column shows the Power-on reset state.

(versatile pins

interface)

1101 0000 4-line motor (using V4 and V5) −

XX01 Q-to-W subcode at V4 −

XX10 V4 = 0 −

XX11 V4 = 1 reset

01XX de-emphasis signal at V5, no internal

de-emphasis ﬁlter

−

10XX V5 = 0 −

11XX V5 = 1 reset

E 1110 XXX0 motor brakes to 12% reset

XXX1 motor brakes to 6% −

XX0X lock-to-disc mode disabled reset

XX1X lock-to-disc mode enabled −

X0XX audio features disabled −

X1XX audio features enabled reset

0XXX quad-speed mode disabled reset

1XXX quad-speed mode enabled −

(subcode

interface and

shadow register

enable)

1111 X0XX subcode interface off reset

X1XX subcode interface on −

0XXX 4-wire subcode reset

1XXX 3-wire subcode −

XX00 SHADEN bits = 00; shadow registers not

enabled; addresses will be decoded by main

decoder registers

reset

XX01 SHADEN bits = 01; SAA732X shadow

registers (bank 1) enabled; all subsequent

addresses will be decoded by shadow

−

XX10 SHADEN bits = 10; new shadow registers

(bank 2) enabled; all subsequent addresses

will be decoded by shadow register (bank 2)

−

XX11 SHADEN bits = 11; new shadow registers

(bank 3) enabled; all subsequent addresses

will be decoded by shadow register (bank 3)

−

(1)

2003 Oct 01 48

Philips Semiconductors Product speciﬁcation

CD audio decoder, digital servo and ﬁlterless

DAC with integrated pre-amp and laser control

SAA7826

Table 17 Loop ﬁlter bandwidth

Note

1. The initial column shows the Power-on reset state.

7.17.5 SUMMARY OF FUNCTIONS CONTROLLED BY SHADOW REGISTERS

Table 18 Bank 1 shadow register settings (single write)

FUNCTION

INITIAL

(1)LOOP

BANDWIDTH

(Hz)

INTERNAL

BANDWIDTH

(Hz)

LOW-PASS

BANDWIDTH

(Hz)

(PLL loop

ﬁlter

bandwidth)

1000 0000 1640 × n 525 × n 8400 × n −

0001 3279 × n 263 × n 16800 × n −

0010 6560 × n 131 × n 33600 × n −

0100 1640 × n 1050 × n 8400 × n −

0101 3279 × n 525 × n 16800 × n −

0110 6560 × n 263 × n 33600 × n −

1000 1640 × n 2101 × n 8400 × n −

1001 3279 × n 1050 × n 16800 × n reset

1010 6560 × n 525 × n 33600 × n −

1100 1640 × n 4200 × n 8400 × n −

1101 3279 × n 2101 × n 16800 × n −

1110 6560 × n 1050 × n 33600 × n −

SHADEN

BITS

SHADOW

ADDRESS DATA FUNCTION INITIAL

(bank 1)

control of

versatileand

clock pins

0011 XX00 select CLK4 on CLK4/12 output reset

XX01 select CLK12 on CLK4/12 output −

X0XX enable CLK16 output pin reset

X1XX set CLK16 output pin to

high-impedance

−

0XXX set V3 output pin to high-impedance reset

1XXX enable V3 output pin −

control of

onboard

DAC

0111 0000 use external DAC or route audio data

back into onboard DAC

(loopback mode)

reset

0010 route audio data directly into onboard

DAC (non-loopback mode)

−

EBU mute

bypass

control (for

M1 version

only)

XXX0 EBU mute function not bypassed reset

XXX1 EBU mute function bypassed −

SAA7826HL/M1A,557

Mfr. #:

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Manufacturer:

NXP Semiconductors

Description:

IC DIGITAL/CD DAC DECODER 80LQFP

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SAA7826HL/M1A,557

SAA7826HL/M1A,557

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