AD9240
REV.
–12–
REFERENCE OPERATION
The AD9240 contains an onboard bandgap reference that pro-
vides a pin-strappable option to generate either a 1 V or 2.5 V
output. With the addition of two external resistors, the user can
generate reference voltages other than 1 V and 2.5 V. Another
alternative is to use an external reference for designs requiring
enhanced accuracy and/or drift performance. See Table II for a
summary of the pin-strapping options for the AD9240 reference
configurations.
Figure 29 shows a simplified model of the internal voltage
reference of the AD9240. A pin-strappable reference ampli-
fier buffers a 1 V fixed reference. The output from the refer-
ence amplifier, A1, appears on the VREF pin. The voltage on
the VREF pin determines the full-scale input span of the A/D.
This input span equals,
Full-Scale Input Span = 2
×
VREF
The voltage appearing at the VREF pin as well as the state of
the internal reference amplifier, A1, are determined by the volt-
age appearing at the SENSE pin. The logic circuitry contains
two comparators which monitor the voltage at the SENSE pin.
The comparator with the lowest set point (approximately 0.3 V)
controls the position of the switch within the feedback path of
A1. If the SENSE pin is tied to REFCOM, the switch is con-
nected to the internal resistor network thus providing a VREF of
2.5 V. If the SENSE pin is tied to the VREF pin via a short or
resistor, the switch is connected to the SENSE pin. A short will
provide a VREF of 1.0 V while an external resistor network will
provide an alternative VREF between 1.0 V and 2.5 V.
The second comparator controls internal circuitry that will
disable the reference amplifier if the SENSE pin is tied AVDD.
Disabling the reference amplifier allows the VREF pin to be
driven by an external voltage reference.
A2
5kV
5kV
5kV
5kV
LOGIC
DISABLE
A2
7.5kV
LOGIC
A1
5kV
DISABLE
A1
1V
TO
A/D
AD9240
CAPT
CAPB
VREF
SENSE
REFCOM
Figure 29. Equivalent Reference Circuit
The actual reference voltages used by the internal circuitry of
the AD9240 appear on the CAPT and CAPB pins. For proper
operation when using the internal or an external reference, it is
necessary to add a capacitor network to decouple these pins.
Figure 30 shows the recommended decoupling network. This
capacitive network performs the following three functions: (1)
along with the reference amplifier, A2, it provides a low source
impedance over a large frequency range to drive the A/D inter-
nal circuitry, (2) it provides the necessary compensation for A2
and (3) it bandlimits the noise contribution from the reference.
The turn-on time of the reference voltage appearing between
CAPT and CAPB is approximately 15 ms and should be evalu-
ated in any power-down mode of operation.
0.1mF
10mF
0.1mF
0.1mF
CAPT
CAPB
AD9240
Figure 30. Recommended CAPT/CAPB Decoupling Network
The A/D’s input span may be varied dynamically by changing
the differential reference voltage appearing across CAPT and
CAPB symmetrically around 2.5 V (i.e., midsupply). To change
the reference at speeds beyond the capabilities of A2, it will be
necessary to drive CAPT and CAPB with two high speed, low
noise amplifiers. In this case, both internal amplifiers (i.e., A1
and A2) must be disabled by connecting SENSE to AVDD and
VREF to REFCOM and the capacitive decoupling network
removed. The external voltages applied to CAPT and CAPB
must be 2.5 V + Input Span/4 and 2.5 V – Input Span/4, respec-
tively, where the input span can be varied between 2 V and 5 V.
Note that those samples within the pipeline A/D during any
reference transition will be corrupted and should be discarded.
B
AD9240
REV.
–13–
DRIVING THE ANALOG INPUTS
INTRODUCTION
The AD9240 has a highly flexible input structure allowing it to
interface with single-ended or differential input interface cir-
cuitry. The applications shown in sections Driving the Analog
Inputs and Reference Configurations, along with the informa-
tion presented in the Input and Reference Overview section of
this data sheet, give examples of both single-ended and differen-
tial operation. Refer to Tables I and II for a list of the different
possible input and reference configurations and their associated
figures in the data sheet.
The optimum mode of operation, analog input range and asso-
ciated interface circuitry will be determined by the particular
applications performance requirements as well as power supply
options. For example, a dc coupled single-ended input may be
appropriate for many data acquisition and imaging applications.
Also, many communication applications which require a dc
coupled input for proper demodulation can take advantage of
the excellent single-ended distortion performance of the AD9240.
The input span should be configured such that the system’s
performance objectives and the headroom requirements of the
driving op amp are simultaneously met.
Alternatively, the differential mode of operation provides the
best THD and SFDR performance over a wide frequency range.
A transformer coupled differential input should be considered
for the most demanding spectral-based applications which allow
ac coupling (e.g., Direct IF to Digital Conversion). The dc-
coupled differential mode of operation also provides an enhance-
ment in distortion and noise performance at higher input spans.
Furthermore, it allows the AD9240 to be configured for a 5 V
span using op amps specified for +5 V or ±5 V operation.
Single-ended operation requires that VINA be ac or dc coupled
to the input signal source while VINB of the AD9240 be biased
to the appropriate voltage corresponding to a midscale code
transition. Note that signal inversion may be easily accom-
plished by transposing VINA and VINB.
Differential operation requires that VINA and VINB be simulta-
neously driven with two equal signals that are in and out of
phase versions of the input signal. Differential operation of the
AD9240 offers the following benefits: (1) Signal swings are
smaller and therefore linearity requirements placed on the input
signal source may be easier to achieve, (2) Signal swings are
smaller and therefore may allow the use of op amps which
may otherwise have been constrained by headroom limitations,
(3) Differential operation minimizes even-order harmonic prod-
ucts and (4) Differential operation offers noise immunity based
on the device’s common-mode rejection as shown in Figure 16.
As is typical of most CMOS devices, exceeding the supply limits
will turn on internal parasitic diodes resulting in transient cur-
rents within the device. Figure 31 shows a simple means of
clamping a dc coupled input with the addition of two series
resistors and two diodes. Note that a larger series resistor could
be used to limit the fault current through D1 and D2 but should be
evaluated since it can cause a degradation in overall performance.
AVDD
R
S1
30V
V
CC
V
EE
D2
1N4148
D1
1N4148
R
S2
20V
AD9240
Figure 31. Simple Clamping Circuit
DIFFERENTIAL MODE OF OPERATION
Since not all applications have a signal preconditioned for
differential operation, there is often a need to perform a
single-ended-to-differential conversion. A single-ended-to-
differential conversion can be realized with an RF transformer
or a dual op amp differential driver. The optimum method
depends on whether the application requires the input signal to
be ac or dc coupled to AD9240.
AC Coupling via an RF Transformer
An RF transformer with a center tap can be used to generate
differential inputs for the AD9240. It provides all of the benefits
of operating the ADC in the differential mode while contribut-
ing no additional noise and minimal distortion. As a result, an
RF transformer is recommended in high frequency applica-
tions, especially undersampling, in which the performance of
a dual op amp differential driver may not be adequate. An RF
transformer has the added benefit of providing electrical isola-
tion between the signal source and the ADC. However, since the
lower cutoff frequency of most RF transformers is nominally a
few 100 kHz, a dual op amp differential driver may be more suit-
able in ac-coupling applications, where the spectral content of the
input signal falls below the cutoff frequency of a suitable RF
transformer.
Figure 32 is a suggested transformer circuit using a Mini-
Circuits RF transformer, model #T4-6T, which has an imped-
ance ratio of four (turns ratio of 2). The 1:4 impedance ratio
requires the 200 secondary termination for optimum power
transfer and VSWR. The centertap of the transformer provides
a convenient means of level-shifting the input signal to a de-
sired common-mode voltage. Optimum performance can be
realized when the centertap is tied to CML of the AD9240
which is the common-mode bias level of the internal SHA.
VINA
CML
VINB
AD9240
0.1mF
200V
MINI-CIRCUITS
T4-6T
50V
Figure 32. Transformer Coupled Input
Transformers with other turns ratios may also be selected to
optimize the performance of a given application. For example, a
given input signal source or amplifier may realize an improve-
ment in distortion performance at reduced output power levels
and signal swings. Hence, selecting a transformer with a higher
impedance ratio (i.e., Mini-Circuits T16-6T with a 1:16 imped-
ance ratio) effectively “steps up” the signal level, further reduc-
ing the driving requirements of the signal source.
B
AD9240
REV.
–14–
AC Coupling with Op Amps
As previously stated, a dual op amp differential driver may be
more suitable in applications in which the spectral content of the
input signal falls below the cutoff frequency of a suitable RF
transformer and/or the cost of an RF transformer and a low
distortion driver for the transformer is prohibitive.
The ac-coupled differential driver shown in Figure 33 is best
suited for ±5 V systems in which the input signal is ground
referenced. In this case, V
CM
will be 0 V. This driver circuit can
achieve performance similar to an RF transformer over the
AD9240’s full Nyquist bandwidth of 5 MHz. However, unlike
the RF transformer, the lower cutoff frequency can be arbitrarily
set low by adjusting the RC time constant formed by C
C
and
R
B
/2. C
N
, in combination with R
S
, can be used to limit the con-
tribution of op amp-generated noise at higher frequencies. Low
cost, high performance dual op amps operating from ±5 V such
as the AD8056 and AD8058, are excellent choices for this appli-
cation and are capable of maintaining 78 dB SNR and 83 dB
THD at 1 MHz (5 V span). An optional resistor R
O
can be
added to U1B to achieve a similar group delay as U1A, potentially
improving overall distortion performance. A resistor divider net-
work formed by R
B
centers the inputs of the AD9240 around
AVDD/2 to achieve its optimum distortion performance.
V
CM
SOURCE
R
O
C
N
R
B
5kV
R
S
C
C
0.1mF
V
CC
R
B
5kV
C
C
0.1mF
V
CC
U1A
U1B
R
S
R
B
5kV
R
B
5kV
Figure 33. AC Coupling of Op Amps
DC Coupling with Op Amps
The dc-coupled differential driver in Figure 34 is best suited for
±5 V systems in which the input signal is ground referenced and
optimum distortion performance is desired. This driver circuit
provides the ability to level-shift the input signal to within the
common-mode range of the AD9240. The two op amps are
configured as matched differential amps with the input signal
applied to opposing inputs to provide the differential output.
The common-mode offset voltage is applied to the noninverting
resistor network, which provides the proper level shifting. The
AD9631 is given as the amplifier of choice in this application
due to its superior distortion performance for relatively large
output swings and wide bandwidth. If cost or space are factors,
the AD8056 dual op amp will save on both, but at the cost of
slightly increased distortion with large signal levels. Figure 34
also illustrates the use of protection diodes, which are used to
protect the AD9240 from any fault condition in which the op
amps outputs inadvertently go above V
DD
or below GND.
VINA
VINB
CML
AD9240
390V
390V
V
IN
V
CML
–VIN
V
CML
+VIN
AVDD
390V
390V
220V
390V
AVDD
390V
220V
390V
AD9631
AD9631
2.5kV
33V
100V
0.1mF
1mF
0.1mF
OP113
33V
390V
0.1mF
0.1mF
Figure 34. Differential Driver with Level-Shifting
Single Supply DC-Coupled Driver
The circuit of Figure 33 can be easily modified for a single
supply, dc-coupled application. This is done by biasing V
CM
to
AVDD/2, the normal common-mode level in a single supply
system. Since the outputs of the op amps are centered at
AVDD/2, the ac coupling network of C
C
and R
B
can be removed.
With this done, the differential driving pair can now be run from
a single supply.
SINGLE-ENDED MODE OF OPERATION
The AD9240 can be configured for single-ended operation
using dc or ac coupling. In either case, the input of the A/D
must be driven from an operational amplifier that will not de-
grade the A/D’s performance. Because the A/D operates from a
single supply, it will be necessary to level-shift ground-based
bipolar signals to comply with its input requirements. Both dc
and ac coupling provide this necessary function, but each
method results in different interface issues which may influence
the system design and performance.
DC COUPLING AND INTERFACE ISSUES
Many applications require the analog input signal to be dc
coupled to the AD9240. An operational amplifier can be con-
figured to rescale and level-shift the input signal so it is compat-
ible with the selected input range of the A/D. The input range
to the A/D should be selected on the basis of system perfor-
mance objectives as well as the analog power supply availability
since this will place certain constraints on the op amp selection.
Many of the new high performance op amps are specified for
only ±5 V operation and have limited input/output swing capa-
bilities. Hence, the selected input range of the AD9240 should
be sensitive to the headroom requirements of the particular op
amp to prevent clipping of the signal. Also, since the output of a
dual supply amplifier can swing below –0.3 V, clamping its
output should be considered in some applications.
In some applications, it may be advantageous to use an op amp
specified for single supply +5 V operation since it will inherently
limit its output swing to within the power supply rails. Rail-to-
rail output amplifiers such as the AD8041 allow the AD9240 to
be configured with larger input spans which improves the noise
performance.
B

AD9240ASRL

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Analog to Digital Converters - ADC Complete 14B 10 MSPS Monolithic
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