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XE3005/XE3006
1. Leave the NRESET pin not connected. In this case the CODEC will startup as described in figure 10.
2. Use the NRESET pin as an output to indicate, to e.g. a microcontroller, that the CODEC finished its power up
sequence and that the CODEC is ready to operate.
3. Use the NRESET pin to force a re-initialization of the registers to their default values. In this case the user has to
force the NRESET to 0V for at least 32 periods of the MCLK. The circuit which forces the NRESET to 0V should
be able to sink at least 50 uA.
Figure 12 shows the block diagram of the CODEC reset.
XE3005/6
MCLK
NRESET
delay
delay
counter
Power
On
Reset
reset to analog and
digital circuitry of codec
low drive
buffer
Figure 12: Codec reset circuitry
2.2 POWER-DOWN FUNCTIONS
2.2.1 Software Power-Down
Register I allows for the selective power down of the ADC signal channel or the DAC signal channel through SPI control.
The wake-up time, after powering down the device is typically 200µs. The maximum standby current is 96µA, depending
highly upon the Master clock (MCLK), see 5.3.5.2 Low Power Modes.
2.2.2 Hardware Power-Down
The device has no power-down pin. However, by holding down (0 V) the NRESET pin (resetting the device) as well as
the pins MCLK, BCLK and FSYNC, the power consumption will reach the standby current of typically 16µA. Use the
standard procedure for power up (see start-up and initialization procedure) after a hardware power down and apply your
registers setup procedure.
