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4
XE3005/XE3006
1.1 TERMINALS DESCRIPTION XE3005/6
Terminals
Description
XE3006 XE3005 Name Type
1
TSSOP24 TSSOP20
uCSP
®
1 1 A2 MCLK DI
Master Clock. MCLK derives the internal clocks of ADC and
DAC
2 N/A N/A SMAD DO Sandman output ADC
3 N/A N/A SMDA DO Sandman output DAC
4 3 A1 VDD AI Digital power supply
5 4 B1 NRESET ZI/O
Reset signal generated by the CODEC. If required, the reset
signal can be applied externally to initialize all the internal
CODEC registers
6 N/A N/A VSSA AI Analog ground
7 5 C2 VREG16 AO
Regulator voltage 1.6 V. Can be used to supply the
microphone
8 6 C1 VREF AO Reference voltage
9 7 D1 VSSA AI Analog ground
10 8 D2 VSSD AI Digital ground
11 9 E2 VREG11 AO ADC Regulated microphone output supply voltage 1.1 V
12 10 E1 AIN AI ADC Analog input signal
13 11 E3 VSSPA AI DAC Power Amplifier Ground
14 12 E4 AOUTN AO DAC Analog Output negative
15 13 D3 VDDPA AI DAC Power Amplifier Supply
16 14 D4 AOUTP AO DAC Analog Output positive
17 15 C3 FSYNC DI/O Serial audio interface Frame Synchronization
18 16 C4 BCLK DI/O Serial audio interface Bit Clock
19 17 B3 SDO ZO Serial audio interface Data Output
20 18 B4 SDI DI PD Serial audio interface Data Input
21 N/A N/A MISO ZO SPI Master In Slave Out
22 19 A4 SCK DI PD SPI Serial Clock
23 2 B2 SS DI PU SPI Slave Select
24 20 A3 MOSI DI PD SPI Master Out Slave In
Note: (1) AI = Analog Input AO = Analog Output
DI = Digital Input DO = Digital Output
DI/O = Digital In or Out ZO = Hi Impedance or Output
PU = internal Pull Up PD = internal Pull Down
ZI/O = Hi impedance In or Out
