PIC18FXX20
DS39583C-page 10 2010 Microchip Technology Inc.
3.2 Code Memory Programming
Programming code memory is accomplished by first
loading data into the appropriate write buffers and then
initiating a programming sequence. Each panel in the
code memory space (see Figure 2-2) has an 8-byte
deep write buffer that must be loaded prior to initiating
a write sequence. The actual memory write sequence
takes the contents of these buffers and programs the
associated EEPROM code memory.
Typically, all of the program buffers are written in
parallel (Multi-Panel Write mode). In other words, in the
case of a 128-Kbyte device (16 panels with an 8-byte
buffer per panel), 128 bytes will be simultaneously
programmed during each programming sequence. In
this case, the offset of the write within each panel is the
same (see Figure 3-5). Multi-Panel Write mode is
enabled by appropriately configuring the Programming
Control register located at 3C0006h.
The programming duration is externally timed and is
controlled by SCLK. After a “Start Programming”
command is issued (4-bit command, ‘1111’), a NOP is
issued, where the 4th SCLK is held high for the
duration of the programming time, P9.
After SCLK is brought low, the programming sequence
is terminated. SCLK must be held low for the time
specified by parameter P10 to allow high voltage
discharge of the memory array.
The code sequence to program a PIC18FXX20 device
is shown in Figure 3-3. The flowchart shown in
Figure 3-6 depicts the logic necessary to completely
write a PIC18FXX20 device. The timing diagram that
details the “Start Programming” command, and
parameters P9 and P10, is shown in Figure 3-7.
Note: The TBLPTR register must contain the
same offset value when initiating the pro-
gramming sequence as it did when the
write buffers were loaded.
