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PIC18F8620-I/PT

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24P25-P27P28-P30P31-P33P34-P36P37-P39P40-P40
PIC18FXX20
DS39583C-page 28 2010 Microchip Technology Inc.
T1OSCMX
(3)
CONFIG3H Timer1 Oscillator MUX bit
1 = Legacy Timer1 oscillator selected
0 = Low power Timer1 oscillator selected
CCP2MX CONFIG3H CCP2 MUX bit
1 = CCP2 input/output is multiplexed with RC1
0 = CCP2 input/output is multiplexed with RB3
DEBUG
CONFIG4L Background Debugger Enable bit
1 = Background debugger disabled
0 = Background debugger enabled
LVP CONFIG4L Low Voltage Programming Enable bit
1 = Low voltage programming enabled
0 = Low voltage programming disabled
STVREN CONFIG4L Stack Overflow/Underflow Reset Enable bit
1 = Stack overflow/underflow will cause RESET
0 = Stack overflow/underflow will not cause RESET
CP0 CONFIG5L Code Protection bits (Block 0)
1 = Code memory not code protected
0 = Code memory code protected
CP1 CONFIG5L Code Protection bits (Block 1)
1 = Code memory not code protected
0 = Code memory code protected
CP2 CONFIG5L Code Protection bits (Block 2)
1 = Code memory not code protected
0 = Code memory code protected
CP3 CONFIG5L Code Protection bits (Block 3)
1 = Code memory not code protected
0 = Code memory code protected
CP4
(2)
CONFIG5L Code Protection bits (Block 4)
1 = Code memory not code protected
0 = Code memory code protected
CP5
(2)
CONFIG5L Code Protection bits (Block 5)
1 = Code memory not code protected
0 = Code memory code protected
CP6
(2)
CONFIG5L Code Protection bits (Block 6)
1 = Code memory not code protected
0 = Code memory code protected
CP7
(2)
CONFIG5L Code Protection bits (Block 7)
1 = Code memory not code protected
0 = Code memory code protected
TABLE 5-3: PIC18FXX20 CONFIGURATION BIT DESCRIPTIONS (CONTINUED)
Bit Name
Configuration
Words
Description
Note 1: Unimplemented in PIC18F6X20 (64-pin) devices; maintain this bit set.
2: Unimplemented in PIC18FX620 devices; maintain this bit set.
3: PIC18F8520/8620 devices only.
2010 Microchip Technology Inc. DS39583C-page 29
PIC18FXX20
CPD CONFIG5H Code Protection bits (Data EEPROM)
1 = Data EEPROM not code protected
0 = Data EEPROM code protected
CPB CONFIG5H Code Protection bits (Boot Block)
1 = Boot block not code protected
0 = Boot block code protected
WRT0 CONFIG6L Table Write Protection bit (Block 0)
1 = Code memory not write protected
0 = Code memory write protected
WRT1 CONFIG6L Table Write Protection bit (Block 1)
1 = Code memory not write protected
0 = Code memory write protected
WRT2 CONFIG6L Table Write Protection bit (Block 2)
1 = Code memory not write protected
0 = Code memory write protected
WRT3 CONFIG6L Table Write Protection bit (Block 3)
1 = Code memory not write protected
0 = Code memory write protected
WRT4
(2)
CONFIG6L Table Write Protection bit (Block 4)
1 = Code memory not write protected
0 = Code memory write protected
WRT5
(2)
CONFIG6L Table Write Protection bit (Block 5)
1 = Code memory not write protected
0 = Code memory write protected
WRT6
(2)
CONFIG6L Table Write Protection bit (Block 6)
1 = Code memory not write protected
0 = Code memory write protected
WRT7
(2)
CONFIG6L Table Write Protection bit (Block 7)
1 = Code memory not write protected
0 = Code memory write protected
WRTD CONFIG6H Table Write Protection bit (Data EEPROM)
1 = Data EEPROM not write protected
0 = Data EEPROM write protected
WRTB CONFIG6H Table Write Protection bit (Boot Block)
1 = Boot block not write protected
0 = Boot block write protected
WRTC CONFIG6H Table Write Protection bit (Configuration registers)
1 = Configuration registers not write protected
0 = Configuration registers write protected
TABLE 5-3: PIC18FXX20 CONFIGURATION BIT DESCRIPTIONS (CONTINUED)
Bit Name
Configuration
Words
Description
Note 1: Unimplemented in PIC18F6X20 (64-pin) devices; maintain this bit set.
2: Unimplemented in PIC18FX620 devices; maintain this bit set.
3: PIC18F8520/8620 devices only.
PIC18FXX20
DS39583C-page 30 2010 Microchip Technology Inc.
EBTR0 CONFIG7L Table Read Protection bit (Block 0)
1 = Code memory not protected from table reads executed in other
blocks
0 = Code memory protected from table reads executed in other blocks
EBTR1 CONFIG7L Table Read Protection bit (Block 1)
1 = Code memory not protected from Table Reads executed in other
blocks
0 = Code memory protected from Table Reads executed in other blocks
EBTR2 CONFIG7L Table Read Protection bit (Block 2)
1 = Code memory not protected from Table Reads executed in other
blocks
0 = Code memory protected from Table Reads executed in other blocks
EBTR3 CONFIG7L Table Read Protection bit (Block 3)
1 = Code memory not protected from Table Reads executed in other
blocks
0 = Code memory protected from Table Reads executed in other blocks
EBTR4
(2)
CONFIG7L Table Read Protection bit (Block 4)
1 = Code memory not protected from Table Reads executed in other
blocks
0 = Code memory protected from Table Reads executed in other blocks
EBTR5
(2)
CONFIG7L Table Read Protection bit (Block 5)
1 = Code memory not protected from Table Reads executed in other
blocks
0 = Code memory protected from Table Reads executed in other blocks
EBTR6
(2)
CONFIG7L Table Read Protection bit (Block 6)
1 = Code memory not protected from Table Reads executed in other
blocks
0 = Code memory protected from Table Reads executed in other blocks
EBTR7
(2)
CONFIG7L Table Read Protection bit (Block 7)
1 = Code memory not protected from Table Reads executed in other
blocks
0 = Code memory protected from Table Reads executed in other blocks
EBTRB CONFIG7H Table Read Protection bit (Boot Block)
1 = Boot block not protected from Table Reads executed in other blocks
0 = Boot block protected from Table Reads executed in other blocks
DEV10:DEV3 DEVID2 Device ID bits
These bits are used with the DEV2:DEV0 bits in the DEVID1 register to
identify part number.
DEV2:DEV0 DEVID1 Device ID bits
These bits are used with the DEV10:DEV3 bits in the DEVID2 register to
identify part number.
REV4:REV0 DEVID1 These bits are used to indicate the revision of the device.
TABLE 5-3: PIC18FXX20 CONFIGURATION BIT DESCRIPTIONS (CONTINUED)
Bit Name
Configuration
Words
Description
Note 1: Unimplemented in PIC18F6X20 (64-pin) devices; maintain this bit set.
2: Unimplemented in PIC18FX620 devices; maintain this bit set.
3: PIC18F8520/8620 devices only.
P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24P25-P27P28-P30P31-P33P34-P36P37-P39P40-P40

PIC18F8620-I/PT

Mfr. #:
Buy PIC18F8620-I/PT
Manufacturer:
Microchip Technology
Description:
8-bit Microcontrollers - MCU 64KB 3840 RAM 68I/O
Lifecycle:
New from this manufacturer.
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