PIC18FXX20
DS39583C-page 22 2010 Microchip Technology Inc.
4.3 Verify Configuration Bits
A configuration address may be read and output on
SDATA via the 4-bit command, ‘1001’. Configuration
data is read and written in a byte-wise fashion, so it is
not necessary to merge two bytes into a word prior to a
compare. The result may then be immediately
compared to the appropriate configuration data in the
programmer’s memory for verification. Refer to
Section 4.1 for implementation details of reading
configuration data.
4.4 Read Data EEPROM Memory
Data EEPROM is accessed one byte at a time via an
Address Pointer (register pair EEADR:EEADRH) and a
data latch (EEDATA). Data EEPROM is read by loading
EEADR:EEADRH with the desired memory location
and initiating a memory read by appropriately
configuring the EECON1 register. The data will be
loaded into EEDATA, where it may be serially output on
SDATA via the 4-bit command, ‘0010’ (Shift Out Data
Holding register). A delay of P6 must be introduced
after the falling edge of the 8th SCLK of the operand to
allow SDATA to transition from an input to an output.
During this time, SCLK must be held low (see
Figure 4-4).
The command sequence to read a single byte of data
is shown in Figure 4-2.
FIGURE 4-3: READ DATA EEPROM
FLOW
Start
Set
Address
Read
Byte
Done
No
Yes
Done
?
Move to TABLAT
Shift Out Data
