PCF85063TP All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2015. All rights reserved.
Product data sheet Rev. 4 — 6 May 2015 50 of 52
NXP Semiconductors
PCF85063TP
Tiny Real-Time Clock/calendar
26. Tables
Table 1. Ordering information . . . . . . . . . . . . . . . . . . . . .2
Table 2. Ordering options. . . . . . . . . . . . . . . . . . . . . . . . .2
Table 3. Marking codes . . . . . . . . . . . . . . . . . . . . . . . . . .2
Table 4. Pin description . . . . . . . . . . . . . . . . . . . . . . . . . .3
Table 5. Registers overview . . . . . . . . . . . . . . . . . . . . . .5
Table 6. Control_1 - control and status register 1
(address 00h) bit description . . . . . . . . . . . . . . .6
Table 7. First increment of time circuits after STOP bit
release . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .9
Table 8. Register reset values . . . . . . . . . . . . . . . . . . . .10
Table 9. Control_2 - control and status register 2
(address 01h) bit description . . . . . . . . . . . . . .11
Table 10. Effect of bits MI and HMI on INT
generation . .12
Table 11. CLKOUT frequency selection . . . . . . . . . . . . .12
Table 12. Offset - offset register (address 02h) bit
description . . . . . . . . . . . . . . . . . . . . . . . . . . . .13
Table 13. Offset values . . . . . . . . . . . . . . . . . . . . . . . . . .13
Table 14. Correction pulses for MODE = 0 . . . . . . . . . . .14
Table 15. Effect of correction pulses on frequencies for
MODE = 0. . . . . . . . . . . . . . . . . . . . . . . . . . . . .14
Table 16. Correction pulses for MODE = 1 . . . . . . . . . . .15
Table 17. Effect of correction pulses on frequencies for
MODE = 1. . . . . . . . . . . . . . . . . . . . . . . . . . . . .15
Table 18. RAM_byte - 8-bit RAM register (address 03h)
bit description . . . . . . . . . . . . . . . . . . . . . . . . . .17
Table 19. Seconds - seconds register (address 04h) bit
description . . . . . . . . . . . . . . . . . . . . . . . . . . . .17
Table 20. Seconds coded in BCD format . . . . . . . . . . . .18
Table 21. Minutes - minutes register (address 05h) bit
description . . . . . . . . . . . . . . . . . . . . . . . . . . . .19
Table 22. Hours - hours register (address 06h) bit
description . . . . . . . . . . . . . . . . . . . . . . . . . . . .19
Table 23. Days - days register (address 07h) bit
description . . . . . . . . . . . . . . . . . . . . . . . . . . . .19
Table 24. Weekdays - weekdays register (address 08h)
bit description . . . . . . . . . . . . . . . . . . . . . . . . .19
Table 25. Weekday assignments . . . . . . . . . . . . . . . . . . .20
Table 26. Months - months register (address 09h) bit
description . . . . . . . . . . . . . . . . . . . . . . . . . . . .20
Table 27. Month assignments in BCD format. . . . . . . . . .20
Table 28. Years - years register (0Ah) bit description. . . .21
Table 29. I
2
C slave address byte . . . . . . . . . . . . . . . . . . .25
Table 30. Limiting values . . . . . . . . . . . . . . . . . . . . . . . . .28
Table 31. Static characteristics . . . . . . . . . . . . . . . . . . . .29
Table 32. I
2
C-bus characteristics . . . . . . . . . . . . . . . . . . .34
Table 33. SnPb eutectic process (from J-STD-020D) . . .40
Table 34. Lead-free process (from J-STD-020D) . . . . . .40
Table 35. Selection of Real-Time Clocks . . . . . . . . . . . . .43
Table 36. Abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . .45
Table 37. Revision history . . . . . . . . . . . . . . . . . . . . . . . .47