PCF85063TP All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2015. All rights reserved.
Product data sheet Rev. 4 — 6 May 2015 7 of 52
NXP Semiconductors
PCF85063TP
Tiny Real-Time Clock/calendar
8.2.1.1 EXT_TEST: external clock test mode
A test mode is available which allows for on-board testing. In this mode, it is possible to
set up test conditions and control the operation of the RTC.
The test mode is entered by setting bit EXT_TEST in register Control_1. Then
pin CLKOUT becomes an input. The test mode replaces the internal clock signal with the
signal applied to pin CLKOUT.
The signal applied to pin CLKOUT should have a minimum pulse width of 300 ns and a
maximum period of 1000 ns. The internal clock, now sourced from CLKOUT, is divided
down to 1 Hz by a 2
6
divide chain called a prescaler. The prescaler can be set into a
known state by using bit STOP. When bit STOP is set, the prescaler is reset to 0. (STOP
must be cleared before the prescaler can operate again.)
From a stop condition, the first 1 second increment will take place after 32 positive edges
on pin CLKOUT. Thereafter, every 64 positive edges cause a 1 second increment.
Remark: Entry into test mode is not synchronized to the internal 64 Hz clock. When
entering the test mode, no assumption as to the state of the prescaler can be made.
Operation example:
1. Set EXT_TEST test mode (register Control_1, bit EXT_TEST = 1)
2. Set STOP (register Control_1, bit STOP = 1)
3. Clear STOP (register Control_1, bit STOP = 0)
4. Set time registers to desired value
5. Apply 32 clock pulses to pin CLKOUT
6. Read time registers to see the first change
7. Apply 64 clock pulses to pin CLKOUT
8. Read time registers to see the second change
Repeat 7 and 8 for additional increments.
