Data Sheet ADuCRF101
OUTLINE DIMENSIONS
COMPLIANT TO JEDEC STANDARDS MO-220-VMMD-4
0.25 MIN
1
64
16
17
49
48
32
33
0.50
0.40
0.30
0.50
BSC
0.20 REF
12° MAX
0.80 MAX
0.65 TYP
1.00
0.85
0.80
7.50 REF
0.05 MAX
0.02 NOM
0.60 MAX
0.60
MAX
SEATING
PLANE
PIN 1
INDICATOR
5.25
5.10 SQ
4.95
PIN 1
INDICATOR
0.30
0.23
0.18
FOR PROPER CONNECTION OF
THE EXPOSED PAD, REFER TO
THE PIN CONFIGURATION AND
FUNCTION DESCRIPTIONS
SECTION OF THIS DATA SHEET.
TOP VIEW
EXPOSED
PAD
BOTTOM VIEW
9.10
9.00 SQ
8.90
8.85
8.75 SQ
8.65
06-14-2012-A
Figure 16. 64-Lead Lead Frame Chip Scale Package [LFCSP_VQ]
9 mm × 9 mm Body, Very Thin Quad
(CP-64-5)
Dimensions shown in millimeters
ORDERING GUIDE
Model
1
Temperature Range Description Package Option
ADuCRF101BCPZ128 −40°C to +85°C 64-Lead Lead Frame Chip Scale Package (LFCSP_VQ) CP-64-5
ADuCRF101BCPZ128R7 −40°C to +85°C 64-Lead Lead Frame Chip Scale Package (LFCSP_VQ) CP-64-5
ADuCRF101BCPZ128RL −40°C to +85°C 64-Lead Lead Frame Chip Scale Package (LFCSP_VQ) CP-64-5
Evaluation Board for 433 MHz Operation
EV-ADuCRF101MK1Z Evaluation Board for 868 MHz/915 MHz Operation
EV-ADuCRF101QSP1Z QuickStart Plus for 868 MHz/915 MHz Operation
EV-ADuCRF101QSP3Z QuickStart Plus for 433 MHz Operation
EV-ADuCRF101QS1Z QuickStart for 868 MHz/915 MHz Operation
EV-ADuCRF101QS3Z QuickStart for 433 MHz Operation
1
Z = RoHS Compliant Part.
I
2
C refers to a communications protocol originally developed by Philips Semiconductors (now NXP Semiconductors).
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D11045-0-11/14(A)
Rev. A | Page 19 of 19
