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ADUCRF101BCPZ128R7

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P20
ADuCRF101 Data Sheet
Rev. A | Page 6 of 18
RF LINK SPECIFICATIONS
Table 2.
Parameter Test Conditions/Comments Min Typ Max Unit
FREQUENCY BANDS RANGE 862 928 MHz
431 464 MHz
PHASE-LOCKED LOOP
Channel Frequency Resolution 396.7 Hz
Phase Noise (In Band) 10 kHz offset, power amplifier (PA) output power = 10 dBm −88 dBc/Hz
DATA RATE
2FSK/GFSK 1 300 kbps
DIFFERENTIAL POWER AMPLIFIER
(PA)
Transmit Power
1
Programmable −17 to +10 dBm
Transmit Power Variation vs.
Temperature
From −40°C to +85°C, RF frequency = 868 MHz ±1 dB
Transmit Power Flatness From 902 MHz to 928 MHz and 863 MHz to 870 MHZ ±1 dB
SINGLE-ENDED PA
Transmit Power
1
Programmable −21 to 13 dBm
Transmit Power Variation vs.
Temperature
From −40°C to +85°C, RF frequency = 868 MHz ±0.5 dB
Transmit Power Flatness From 431 MHz to 464 MHz and 862 MHz to 928 MHZ ±1 dB
HARMONICS
868 MHz, unfiltered conductive, PA output power =
10 dBm
Single-Ended PA
Second Harmonic −29.8 dBc
Third Harmonic −15.9 dBc
Fourth Harmonic −24 dBc
Differential PA
Second Harmonic −33.6 dBc
Third Harmonic −15.6 dBc
Fourth Harmonic −36.7 dBc
OPTIMUM PA LOAD IMPEDANCE
Single-Ended PA, Transmit
Mode
f
RF
= 915 MHz 31.2 + j10.4 Ω
f
RF
= 868 MHz 23.5 + j9.7 Ω
f
RF
= 433 MHz 35.4 + j3.4 Ω
Single-Ended PA, Receive Mode
f
RF
= 915 MHz 7.3 − j126.3 Ω
f
RF
= 868 MHz 6.9 − j134.2 Ω
Differential PA, Transmit Mode
Load impedance between RFIO_1P and RFIO_1N to ensure
maximum output power
f
RF
= 915 MHz 38.7 + j20.6 Ω
f
RF
= 868 MHz 42.2 + j20.1 Ω
f
RF
= 433 MHz 55.6 + j54.9 Ω
2FSK/GFSK INPUT SENSITIVITY,
BER
At BER = 10
−3
1.0 kbps Frequency deviation = 10 kHz, IF filter bandwidth = 100 kHz −116 dBm
38.4 kbps Frequency deviation = 20.0 kHz, IF filter bandwidth = 100 kHz −107.5 dBm
300 kbps Frequency deviation = 75 kHz, IF filter bandwidth = 300 kHz −100.0 dBm
2FSK/GFSK INPUT SENSITIVITY,
PACKET ERROR RATE (PER)
At PER = 1%, packet length = 20 bytes, packet mode
1.0 kbps Frequency deviation = 10 kHz, IF filter bandwidth = 100 kHz −114 dBm
38.4 kbps Frequency deviation = 20.0 kHz, IF filter bandwidth = 100 kHz −105.5 dBm
300 kbps Frequency deviation = 75 kHz, IF filter bandwidth = 300 kHz −96 dBm
Data Sheet ADuCRF101
Rev. A | Page 7 of 18
Parameter Test Conditions/Comments Min Typ Max Unit
ADJACENT CHANNEL REJECTION
Continuous Wave (CW) Interferer
Wanted signal 3 dB above the input sensitivity level
(BER = 10
−3
), CW interferer power level increased until
BER = 10
−3
, image calibrated
±200 kHz Channel Spacing
IF bandwidth (BW) = 100 kHz, wanted signal:
f
DEV
= 12.5 kHz, DR = 50 kbps
+200 kHz channel spacing/−200 kHz channel spacing 36/36 dB
±300 kHz Channel Spacing IF BW = 100 kHz, wanted signal: f
DEV
= 25 kHz, DR = 100 kbps
+300 kHz channel spacing/−300 kHz channel spacing 39/39 dB
±600 kHz Channel Spacing IF BW = 300 kHz, wanted signal: f
DEV
= 75 kHz, DR = 300 kbps
+600 kHz channel spacing/−600 kHz channel spacing 38/30 dB
Modulated Interferer
Wanted signal 3 dB above the input sensitivity level
(BER = 10
−3
), modulated interferer with the same modulation
as the wanted signal; interferer power level increased until
BER = 10
−3
, image calibrated
±200 kHz Channel Spacing IF BW = 100 kHz, wanted signal: f
DEV
= 12.5 kHz, DR = 50 kbps
+200 kHz channel spacing/−200 kHz channel spacing 34/34 dB
±300 kHz Channel Spacing IF BW = 100 kHz, wanted signal: f
DEV
= 25 kHz, DR = 100 kbps
+300 kHz channel spacing/−300 kHz channel spacing 39/35 dB
±600 kHz Channel Spacing IF BW = 300 kHz, wanted signal: f
DEV
= 75 kHz, DR = 300 kbps
+600 kHz channel spacing/−600 kHz channel spacing 35/16 dB
CO-CHANNEL REJECTION
Wanted signal 10 dB above the input sensitivity level
(BER = 10
−3
), data rate = 38.4 kbps, frequency deviation =
20 kHz
−4 dB
BLOCKING, ETSI EN 300 220
Measurement procedure as per ETSI EN 300 220-1 V2.3.1;
wanted signal 3 dB above the ETSI EN 300 220 reference
sensitivity level of −99 dBm, IF bandwidth = 100 kHz, data
rate = 38.4 kbps, unmodulated interferer
±2 MHz −29 dBm
±10 MHz −20.5 dBm
WIDEBAND INTERFERENCE
REJECTION
Swept from 10 MHz to 100 MHz either side of the RF
frequency
75 dB
IMAGE CHANNEL ATTENUATION
Measured as image attenuation at the IF filter output,
carrier wave interferer at 400 kHz below the channel
frequency, 100 kHz IF filter bandwidth
868 MHz Uncalibrated
2
/calibrated 36/42 dB
RSSI
Range at Input −97 to −26 dBm
Linearity ±2 dB
Absolute Accuracy ±3 dB
LNA INPUT IMPEDANCE
Receive Mode
f
RF
= 915 MHz 68.9 − j36.1 Ω
f
RF
= 868 MHz 71.6 − j36.4 Ω
f
RF
= 433 MHz 99.2 − j31.3 Ω
Transmit Mode
f
RF
= 915 MHz 8.6 + j21.1 Ω
f
RF
= 868 MHz 8.6 + j20.4 Ω
f
RF
= 433 MHz 8.2 + j11.4 Ω
RX SPURIOUS EMISSIONS
3
Maximum < 1 GHz At antenna input, unfiltered conductive −66 dBm
Maximum > 1 GHz At antenna input, unfiltered conductive −51 dBm
1
Measured as the maximum unmodulated power.
2
Measured with Bits IMAGE_REJECT_CAL_AMPLITUDE = 0x7 and Bits IMAGE_REJECT_CAL_PHASE = 0x16. For more detailed information, see the UG-231 User Guide.
3
To achieve the relevant FCC/ETSI specifications, follow the matching and layout guideline information provided in the UG-231 User Guide.
ADuCRF101 Data Sheet
Rev. A | Page 8 of 18
TIMING SPECIFICATIONS
I
2
C Timing
Capacitive load for each of the I
2
C bus lines, Cb = 400 pF maximum as per the I
2
C bus specifications. I
2
C timing is guaranteed by design
and not production tested.
I
2
C Timing in Fast Mode (400 kHz)
Table 3.
Parameter Description Min Max Unit
t
L
Clock (I2CSCL) low pulse width 1300 ns
t
H
Clock (I2CSCL) high pulse width 600 ns
t
SHD
Start condition hold time 600 ns
t
DSU
Data (I2CSDA) setup time 100 ns
t
DHD
Data (I2CSDA) hold time 0 ns
t
RSU
Setup time for repeated start 600 ns
t
PSU
Stop condition setup time 600 ns
t
BUF
Bus free time between a stop condition and a start condition 1.3 s
t
R
Rise time for both clock and data 20 + 0.1 Cb 300 ns
t
F
Fall time for both clock and data 20 + 0.1 Cb 300 ns
t
SUP
Pulse width of spike suppressed 0 50 ns
I
2
C Timing in Standard Mode (100 kHz)
Table 4.
Parameter Description Min Max Unit
t
L
Clock (I2CSCL) low pulse width 4.7 µs
t
H
Clock (I2CSCL) high pulse width 4.0 µs
t
SHD
Start condition hold time 4.7 µs
t
DSU
Data (I2CSDA) setup time 250 ns
t
DHD
Data (I2CSDA) hold time 0 µs
t
RSU
Setup time for repeated start 4.0 µs
t
PSU
Stop condition setup time 4.0 µs
t
BUF
Bus free time between a stop condition and a start condition 4.7 µs
t
R
Rise time for both clock and data 1 µs
t
F
Fall time for both clock and data 300 ns
I2CSDA (I/O)
t
BUF
MSB LSB ACK MSB
1982 TO
7
1
I2CSCL (I)
PS
STOP
CONDITION
START
CONDITION
S(R)
REPEATED
START
t
SUP
t
R
t
F
t
F
t
R
t
H
t
L
t
SUP
t
DSU
t
DHD
t
RSU
t
DHD
t
DSU
t
SHD
t
PSU
09464-011
Figure 2. I
2
C Compatible Interface Timing
P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P20

ADUCRF101BCPZ128R7

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Buy ADUCRF101BCPZ128R7
Manufacturer:
Analog Devices Inc.
Description:
RF Microcontrollers - MCU Cortex M 3 MCU + RF integration I.C
Lifecycle:
New from this manufacturer.
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