PCE85133AUG All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2015. All rights reserved.
Product data sheet Rev. 2 — 22 July 2015 37 of 50
NXP Semiconductors
PCE85133AUG
Universal 80 × 4 LCD driver for low multiplex rates
S4 33 1500.03 436.5 LCD segment output
S5 34 1554.03 436.5
S6 35 1608.03 436.5
S7 36 1662.03 436.5
S8 37 1716.03 436.5
S9 38 1770.03 436.5
S10 39 1824.03 436.5
S11 40 1878.03 436.5
S12 41 1423.53 436.5
S13 42 1369.53 436.5
S14 43 1315.53 436.5
S15 44 1261.53 436.5
S16 45 1207.53 436.5
S17 46 1153.53 436.5
S18 47 1099.53 436.5
S19 48 1045.53 436.5
S20 49 991.53 436.5
S21 50 937.53 436.5
S22 51 883.53 436.5
S23 52 829.53 436.5
S24 53 714.06 436.5
S25 54 660.06 436.5
S26 55 606.06 436.5
S27 56 552.06 436.5
S28 57 498.06 436.5
S29 58 444.06 436.5
S30 59 390.06 436.5
S31 60 336.06 436.5
S32 61 282.06 436.5
S33 62 228.06 436.5
S34 63 112.59 436.5
S35 64 58.59 436.5
S36 65 4.59 436.5
S37 66 49.41 436.5
S38 67 103.41 436.5
S39 68 157.41 436.5
S40 69 211.41 436.5
Table 19. Bump locations of PCE85133AUG
All x/y coordinates represent the position of the center of each bump with respect to the center
(x/y = 0) of the chip; see Figure 27
.
Symbol Bump X (m) Y (m) Description
PCE85133AUG All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2015. All rights reserved.
Product data sheet Rev. 2 — 22 July 2015 38 of 50
NXP Semiconductors
PCE85133AUG
Universal 80 × 4 LCD driver for low multiplex rates
S41 70 265.41 436.5 LCD segment output
S42 71 319.41 436.5
S43 72 373.41 436.5
S44 73 427.41 436.5
S45 74 481.41 436.5
S46 75 596.88 436.5
S47 76 650.88 436.5
S48 77 704.88 436.5
S49 78 758.88 436.5
S50 79 812.88 436.5
S51 80 866.88 436.5
S52 81 920.88 436.5
S53 82 974.88 436.5
S54 83 1028.88 436.5
S55 84 1082.88 436.5
S56 85 1136.88 436.5
S57 86 1252.35 436.5
S58 87 1306.35 436.5
S59 88 1360.35 436.5
S60 89 1414.35 436.5
S61 90 1468.35 436.5
S62 91 1522.35 436.5
S63 92 1576.35 436.5
S64 93 1630.35 436.5
S65 94 1684.35 436.5
S66 95 1738.35 436.5
S67 96 1792.35 436.5
S68 97 1876.05 436.5
S69 98 1822.05 436.5
S70 99 1768.05 436.5
S71 100 1714.05 436.5
S72 101 1
660.05 436.5
S73
102 1606.05 436.5
S74 103 1552.05 436.5
S75 104 1498.05 436.5
S76 105 1444.05 436.5
S77 106 1390.05 436.5
S78 107 1336.05 436.5
S79 108 1282.05 436.5
Table 19. Bump locations of PCE85133AUG
All x/y coordinates represent the position of the center of each bump with respect to the center
(x/y = 0) of the chip; see Figure 27
.
Symbol Bump X (m) Y (m) Description
PCE85133AUG All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2015. All rights reserved.
Product data sheet Rev. 2 — 22 July 2015 39 of 50
NXP Semiconductors
PCE85133AUG
Universal 80 × 4 LCD driver for low multiplex rates
[1] For most applications, SDA and SDAACK are shorted together; see Section 7.
[1] Pressure of diamond head: 10 g to 50 g.
BP3 109 1228.05 436.5 LCD backplane output
BP1 110 1174.05 436.5
D1 - 1932.03 436.5 dummy pads
D2 - 1909.53 436.5
D3 - 1801.53 436.5
D4 - 1693.53 436.5
D5 - 1585.53 436.5
D6 - 1477.53 436.5
D7 - 1846.35 436.5
D8 - 1953 436.5
D9 - 1930.05 436.5
Table 20. Gold bump hardness
Type number Min Max Unit
[1]
PCE85133AUG 60 120 HV
The positions of the alignment marks are approximately shown in Figure 27.
Fig 28. Alignment marks of PCE85133AUG
Table 21. Alignment mark locations
All x/y coordinates represent the position of the REF point (see Figure 28
) with respect to the center
(x/y = 0) of the chip; see Figure 27
.
Symbol Size (m) X (m) Y (m)
S1 81 81 1916.1 45
C1 81 81 1855.8 45
Table 19. Bump locations of PCE85133AUG
All x/y coordinates represent the position of the center of each bump with respect to the center
(x/y = 0) of the chip; see Figure 27
.
Symbol Bump X (m) Y (m) Description
DDK
5() 5()
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PCE85133AUG/DAZ

Mfr. #:
Manufacturer:
NXP Semiconductors
Description:
LCD Drivers Universal 80 × 4 LCD driver for low multiplex rates
Lifecycle:
New from this manufacturer.
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