LTC3612
22
3612fc
For more information www.linear.com/LTC3612
applicaTions inForMaTion
Figure 7. DDR Pin Not Tied to S
VIN
Figure 8. DDR Pin Tied to SV
IN
. Example DDR Application
SOFT-START
STATE
t
SS
> 1ms
SHUTDOWN
STATE
0.6V
0.6V
0.2V
0V
0V
0V
0V
V
IN
V
IN
V
FB
PIN
VOLTAGE
TRACK/SS
PIN VOLTAGE
RUN PIN
VOLTAGE
SV
IN
PIN
VOLTAGE
RUN STATE RUN STATE
TIME
3612 F07
REDUCED
SWITCHING
FREQUENCY
DOWN
TRACKING
STATE
UP
TRACKING
STATE
SOFT-START
STATE
t
SS
> 1ms
SHUTDOWN
STATE
0.3V
0.45V
0.45V
0.3V
0.2V
0V
0V
0V
0V
V
IN
V
IN
V
FB
PIN
VOLTAGE
EXTERNAL
VOLTAGE
REFERENCE 0.45V
TRACK/SS
PIN VOLTAGE
RUN PIN
VOLTAGE
SV
IN
PIN
VOLTAGE
RUN STATE RUN STATE
TIME
3612 F08
REDUCED
SWITCHING
FREQUENCY
DOWN
TRACKING
STATE
UP
TRACKING
STATE
LTC3612
23
3612fc
For more information www.linear.com/LTC3612
The R
DS(ON)
for both the top and bottom MOSFETs can
be obtained from the Typical Performance Character-
istics curves. To obtain I
2
R losses, simply add R
SW
to
R
L
and multiply the result by the square of the average
output current.
Other losses including C
IN
and C
OUT
ESR dissipative
losses and inductor core losses generally account for
less than 2% of the total loss.
Thermal Considerations
In most applications, the LTC3612 does not dissipate much
heat due to its high efficiency.
However, in applications where the LTC3612 is running at
high ambient temperature with low supply voltage and high
duty cycles, such as in dropout, the heat dissipated may
exceed the maximum junction temperature of the part. If
the junction temperature reaches approximately 160°C,
both power switches will be turned off and the SW node
will become high impedance.
To prevent the LTC3612 from exceeding the maximum
junction temperature, some thermal analysis is required.
The temperature rise is given by:
T
RISE
= (P
D
)(θ
JA
)
where P
D
is the power dissipated by the regulator and θ
JA
is the thermal resistance from the junction of the die to
the ambient temperature. The junction temperature, T
J
,
is given by:
T
J
= T
A
+ T
RISE
where T
A
is the ambient temperature.
As an example, consider the case when the LTC3612 is in
dropout at an input voltage of 3.3V with a load current of
3A at an ambient temperature of 70°C. From the Typical
Performance Characteristics graph of Switch Resistance,
the R
DS(ON)
resistance of the P-channel switch is 0.075Ω.
Therefore, power dissipated by the part is:
P
D
= (I
OUT
)
2
• R
DS(ON)
= 675mW
For the QFN package, the θ
JA
is 43°C/W.
Therefore, the junction temperature of the regulator op-
erating at 70°C ambient temperature is approximately:
T
J
= 0.675W • 43°C/W + 70°C = 99°C
We can safely assume that the actual junction temperature
will not exceed the absolute maximum junction tempera
-
ture of 125°C.
Note that for very low input voltage, the junction tempera-
ture will be higher due to increased switch resistance,
R
DS(ON)
. It is not recommended to use full load current
for high ambient temperature and low input voltage.
To maximize the thermal performance of the LTC3612 the
Exposed Pad should be soldered to a ground plane. See
the PCB Layout Board Checklist.
Design Example
As a design example, consider using the LTC3612 in an
application with the following specifications:
V
IN
= 2.25V to 5.5V, V
OUT
= 1.8V, I
OUT(MAX)
= 3A, I
OUT(MIN)
= 100mA, f = 2.6MHz.
Efficiency is important at both high and low load current,
so Burst Mode operation will be utilized.
First, calculate the timing resistor:
R
T
=
3.8210
11
Hz
2.6MHz
16k= 130k
Next, calculate the inductor value for about 30% ripple
current at maximum V
IN
:
L =
1.8V
2.6MHz1A
1–
1.8V
5.5V
= 0.466µH
Using a standard value of 0.47µH inductor results in a
maximum ripple current of:
I
L
=
1.8V
2.6MHz0.47µH
1–
1.8V
5.5V
= 0.99A
applicaTions inForMaTion
LTC3612
24
3612fc
For more information www.linear.com/LTC3612
C
OUT
will be selected based on the ESR that is required to
satisfy the output voltage ripple requirement and the bulk
capacitance needed for loop stability. For this design, a
68µF (or 47µF plus 22µF) ceramic capacitor is used with
a X5R or X7R dielectric.
C
IN
should be sized for a maximum current rating of:
I
RMS
= 3A
1.8V
3.6V
3.6V
1.8V
1
= 1.5A
RMS
Decoupling the PV
IN
with two 22µF capacitors, is adequate
for most applications.
If we set R2 = 196k, the value of R1 can now be determined
by solving the following equation.
R1 = 196k
1.8V
0.6V
1
A value of 392k will be selected for R1.
Finally, define the soft start-up time choosing the proper
value for the capacitor and the resistor connected to TRACK/
SS. If we set minimum t
SS
= 5ms and a resistor of 2M,
the following equation can be solved with the maximum
SV
IN
= 5.5V :
C
SS
=
5ms
2MIn
5.5V
5.5V 0.6V
= 21.6nF
The standard value of 22nF guarantees the minimum soft-
start up time of 5ms.
Figure 1 shows the schematic for this design example.
PC Board Layout Checklist
When laying out the printed circuit board, the following
checklist should be used to ensure proper operation of
the LTC3612:
1. A ground plane is recommended. If a ground plane layer
is not used, the signal and power grounds should be
segregated with all small-signal components returning
to the SGND pin at one point which is then connected
to the PGND pin close to the LTC3612.
2. Connect the (+) terminal of the input capacitor(s), C
IN
,
as close as possible to the PV
IN
pin, and the (–) terminal
as close as possible to the exposed pad, PGND. This
capacitor provides the AC current into the internal power
MOSFETs.
3. Keep the switching node, SW, away from all sensitive
small-signal nodes.
4. Flood all unused areas on all layers with copper. Flood
-
ing with copper will reduce the temperature rise of
power components. Connect the copper areas to PGND
(exposed pad) for best performance.
5.
Connect the V
FB
pin directly to the feedback resistors.
The resistor divider must be connected between V
OUT
and SGND.
applicaTions inForMaTion

LTC3612EUDC#PBF

Mfr. #:
Manufacturer:
Analog Devices / Linear Technology
Description:
Switching Voltage Regulators 3A, 4MHz, Monolithic Synchronous Step-Down Regulator
Lifecycle:
New from this manufacturer.
Delivery:
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