AD1928
Rev. B | Page 9 of 32
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
AVDD
48
LF
47
ADC1RN
46
ADC1RP
45
ADC1LN
44
ADC1LP
43
NC
42
NC
41
NC
40
NC
39
CM
38
AVDD
37
13 14 15 16 17 18 19 20 21 22 23
DVDD
DSDATA3
DSDATA2
DSDATA1
DBCLK
DLRCLK
ASDATA1
ADCTDMOUT
ABCLK
ALRCLK
CIN
COUT
24
1
2
3
4
5
6
7
8
9
10
11
12
AGND
36
FILTR
35
AGND
34
AVDD
33
AGND
32
OR2
31
OL2
30
OR1
29
OL1
28
CLATCH
27
CCLK
26
DGND
25
AGND
MCLKI/XI
MCLKO/XO
AGND
AVDD
OL3
OR3
OL4
OR4
PD/RST
DSDATA4
DGND
AD1928
TOP VIEW
(Not to Scale)
SINGLE-ENDED
OUTPUT
NC = NO CONNECT
06623-002
Figure 2. Pin Configuration, 48-Lead LQFP
Table 10. Pin Function Descriptions
Pin No. Input/Output Mnemonic Description
1 I AGND Analog Ground.
2 I MCLKI/XI Master Clock Input/Crystal Oscillator Input.
3 O MCLKO/XO Master Clock Output/Crystal Oscillator Output.
4 I AGND Analog Ground.
5 I AVDD Analog Power Supply. Connect to analog 3.3 V supply.
6 O OL3 DAC Left 3 Output.
7 O OR3 DAC Right 3Output.
8 O OL4 DAC Left 4 Output.
9 O OR4 DAC Right 4 Output.
10 I
PD
/RST
Power-Down Reset (Active Low).
11 I/O DSDATA4
DAC Serial Data Input 4. Data input to DAC4 data in/TDM DAC2 data out (dual-line
mode)/AUX DAC2 data out (to external DAC2).
12 I DGND Digital Ground.
13 I DVDD Digital Power Supply. Connect to digital 3.3 V supply.
14 I/O DSDATA3
DAC Serial Data Input 3. Data input to DAC3 data in/TDM DAC2 data in (dual-line
mode)/AUX ADC2 data in (from external ADC2).
15 I/O DSDATA2
DAC Serial Data Input 2. Data input to DAC2 data in/TDM DAC data out/AUX ADC1 data in
(from external ADC1).
16 I DSDATA1 DAC Serial Data Input 1. Data input to DAC1 data in/TDM DAC data in/TDM data in.
17 I/O DBCLK Bit Clock for DACs.
18 I/O DLRCLK LR Clock for DACs.
19 I/O ASDATA1 ADC Serial Data Output 1. Data output from ADC1/TDM ADC data out/TDM data out.
20 O ADCTDMOUT ADC TDM Data Output.
21 I/O ABCLK Bit Clock for ADCs.
22 I/O ALRCLK LR Clock for ADCs.
23 I CIN Control Data Input (SPI).
24 I/O COUT Control Data Output (SPI).
