Integrated Silicon Solution, Inc. — 1-800-379-4774
19
Rev. 00A
07/11/05
ISSI
®
IS43R16800A
Current state /CS /RAS /CAS /WE Address Command Operation Next state
Read*
6
H × × × × DESL NOP Active
L H H H × NOP NOP Active
L H H L × BST BST Active
L H L H BA, CA, A10 READ/READA
Interrupting burst read
operation to
start new read
Active
L H L L BA, CA, A10 WRIT/WRITA ILLEGAL*
13
L L H H BA, RA ACT ILLEGAL*
11
L L H L BA, A10 PRE, PALL
Interrupting burst
read operation to
start pre-charge
Precharging
L L L × × ILLEGAL
Read with
auto-pre-
charge*
7
H × × × × DESL NOP Precharging
L H H H × NOP NOP Precharging
L H H L × BST ILLEGAL
L H L H BA, CA, A10 READ/READA ILLEGAL*
14
L H L L BA, CA, A10 WRIT/WRITA ILLEGAL*
14
L L H H BA, RA ACT ILLEGAL*
11, 14
L L H L BA, A10 PRE, PALL ILLEGAL*
11, 14
L L L × × ILLEGAL
Write*
8
H × × × × DESL NOP
Write
recovering
L H H H × NOP NOP
Write
recovering
L H H L × BST ILLEGAL
L H L H BA, CA, A10 READ/READA
Interrupting burst write
operation to
start read operation.
Read/ReadA
L H L L BA, CA, A10 WRIT/WRITA
Interrupting burst write
operation to
start new write
operation.
Write/WriteA
L L H H BA, RA ACT ILLEGAL*
11
L L H L BA, A10 PRE, PALL
Interrupting write
operation to start pre-
charge.
Idle
L L L × × ILLEGAL
Write recovering*
9
H × × × × DESL NOP Active
L H H H × NOP NOP Active
L H H L × BST ILLEGAL
L H L H BA, CA, A10 READ/READA Starting read operation. Read/ReadA
L H L L BA, CA, A10 WRIT/WRITA
Starting new write
operation.
Write/WriteA
L L H H BA, RA ACT ILLEGAL*
11
L L H L BA, A10 PRE/PALL ILLEGAL*
11
L L L × × ILLEGAL
20
Integrated Silicon Solution, Inc. — 1-800-379-4774
Rev. 00A
07/11/05
ISSI
®
IS43R16800A
Current state /CS /RAS /CAS /WE Address Command Operation Next state
Write with
auto-
pre-charge*
10
H × × × × DESL NOP Precharging
L H H H × NOP NOP Precharging
L H H L × BST ILLEGAL
L H L H BA, CA, A10 READ/READA ILLEGAL*
14
L H L L BA, CA, A10 WRIT/WRIT A ILLEGAL*
14
L L H H BA, RA ACT ILLEGAL*
11, 14
L L H L BA, A10 PRE, PALL ILLEGAL*
11, 14
L L L × × ILLEGAL
Remark: H: VIH. L: VIL. ×: VIH or VIL
Notes: 1. The DDR SDRAM is in "Precharging" state for tRP after precharge command is issued.
2. The DDR SDRAM reaches "IDLE" state tRP after precharge command is issued.
3. The DDR SDRAM is in "Refresh" state for tRFC after auto-refresh command is issued.
4. The DDR SDRAM is in "Activating" state for tRCD after ACT command is issued.
5. The DDR SDRAM is in "Active" state after "Activating" is completed.
6. The DDR SDRAM is in "READ" state until burst data have been output and DQ output circuits are turned
off.
7. The DDR SDRAM is in "READ with auto-precharge" from READA command until burst data has been
output and DQ output circuits are turned off.
8. The DDR SDRAM is in "WRITE" state from WRIT command to the last burst data are input.
9. The DDR SDRAM is in "Write recovering" for tWR after the last data are input.
10. The DDR SDRAM is in "Write with auto-precharge" until tWR after the last data has been input.
11. This command may be issued for other banks, depending on the state of the banks.
12. All banks must be in "IDLE".
13. Before executing a write command to stop the preceding burst read operation, BST command must be
issued.
14. The DDR SDRAM supports the concurrent auto-precharge feature, a read with auto-precharge enabled,or
a write with auto-precharge enabled, may be followed by any column command to other banks, as long as
that command does not interrupt the read or write data transfer, and all other related limitations apply.
(E.g. Conflict between READ data and WRITE data must be avoided.)
The minimum delay from a read or write command with auto precharge enabled, to a command to a
different bank, is summarized below.
From command
To command (different bank, non-
interrupting command)
Minimum delay
(Concurrent AP supported)
Units
Read w/AP Read or Read w/AP BL/2 tCK
Write or Write w/AP CL(rounded up)+ (BL/2) tCK
Precharge or Activate 1 tCK
Write w/AP Read or Read w/AP 1 + (BL/2) + tWTR tCK
Write or Write w/AP BL/2 tCK
Precharge or Activate 1 tCK
Integrated Silicon Solution, Inc. — 1-800-379-4774
21
Rev. 00A
07/11/05
ISSI
®
IS43R16800A
Command Truth Table for CKE
Current State CKE
n – 1 n /CS /RAS /CAS /WE Address Operation Notes
Self refresh H × × × × × × INVALID, CK (n-1) would exit self refresh
L H H × × × × Self refresh recovery
L H L H H × × Self refresh recovery
L H L H L × × ILLEGAL
L H L L × × × ILLEGAL
L L × × × × × Maintain self refresh
Self refresh recovery H H H × × × × Idle after tRC
H H L H H × × Idle after tRC
H H L H L × × ILLEGAL
H H L L × × × ILLEGAL
H L H × × × × ILLEGAL
H L L H H × × ILLEGAL
H L L H L × × ILLEGAL
H L L L × × × ILLEGAL
Power down H × × × × × INVALID, CK (n – 1) would exit power down
L H H × × × × EXIT power down Idle
L H L H H H ×
L L × × × × × Maintain power down mode
All banks idle H H H × × × Refer to operations in Function Truth Table
H H L H × × Refer to operations in Function Truth Table
H H L L H × Refer to operations in Function Truth Table
H H L L L H × CBR (auto) refresh
H H L L L L OPCODE Refer to operations in Function Truth Table
H L H × × × Refer to operations in Function Truth Table
H L L H × × Refer to operations in Function Truth Table
H L L L H × Refer to operations in Function Truth Table
H L L L L H × Self refresh 1
H L L L L L OPCODE Refer to operations in Function Truth Table
L × × × × × × Power down 1
Row active H × × × × × × Refer to operations in Function Truth Table
L × × × × × × Power down 1
Remark: H: VIH. L: VIL. ×: VIH or VIL
Note: Self refresh can be entered only from the all banks idle state. Power down can be entered only from all
banks idle or row active state.

IS43R16800A-5TL-TR

Mfr. #:
Manufacturer:
ISSI
Description:
DRAM 128M 2.5v 8Mx16 400MHz
Lifecycle:
New from this manufacturer.
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