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ISSI
®
IS43R16800A
Burst Stop
Burst stop command during burst read
The burst stop (BST) command is used to stop data output during a burst read. The BST command stops the burst
read and sets the output buffer to High-Z. tBSTZ (= CL) cycles after a BST command issued, the DQ pins become
High-Z. The BST command is not supported for the burst write operation. Note that bank address is not referred
when this command is executed.
CK
/CK
DQS
DQ
CL = 3
Command
t0 t0.5 t1 t1.5 t2 t2.5 t3 t3.5 t4 t4.5 t5 t5.5
out0 out1
CL: /CAS latency
READ
BST NOP
tBSTZ
3 cycles
Burst Stop during a Read Operation
26
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07/11/05
ISSI
®
IS43R16800A
Auto Precharge
Read with auto-precharge
The precharge is automatically performed after completing a read operation. The precharge starts tRPD (BL/2)
cycle after READA command input. tRAP specification for READA allows a read command with auto precharge to be
issued to a bank that has been activated (opened) but has not yet satisfied the tRAS (min) specification. A column
command to the other active bank can be issued the next cycle after the last data output. Read with auto-precharge
command does not limit row commands execution for other bank. Refer to ‘Function truth table and related
note(Notes.*14).
out0 out1 out2 out3
CK
/CK
DQ
Command
tRP (min)
tRAP (min) = tRCD (min)
ACT
Note: Internal auto-precharge starts at the timing indicated by " ".
NOP
2 cycles (= BL/2)
READAACT
DQS
tAC,tDQSCK
tRPD
Read with auto-precharge
Write with auto-precharge
The precharge is automatically performed after completing a burst write operation. The precharge operation is
started (BL/ 2 + 4) cycles after WRITA command issued. A column command to the other banks can be issued the
next cycle after the internal precharge command issued. Write with auto-precharge command does not limit row
commands execution for other bank. Refer to the ‘Read with Auto-Precharge Enabled, Write with Auto-Precharge
Enabled’ section. Refer to ‘Function truth table and related note(Notes.*14)‘.
in1 in2 in3 in4
CK
/CK
DQ
Command
DM
tRAS (min)
tRCD (min)
tRP
DQS
ACT
WRITA ACT
BL/2 + 4 cycles
Note: Internal auto-precharge starts at the timing indicated by " ".
BL = 4
NOPNOP
Burst Write (BL = 4)
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ISSI
®
IS43R16800A
Command Intervals
A Read command to the consecutive Read command Interval
Destination row of the
consecutive read command
Bank
address
Row address State Operation
1. Same Same ACTIVE
The consecutive read can be performed after an interval of no less than 1 cycle to
interrupt the preceding read operation.
2. Same Different
Precharge the bank to interrupt the preceding read operation. tRP after the
precharge command, issue the ACT command. tRCD after the ACT command, the
consecutive read command can be issued. See ‘A read command to the
consecutive precharge interval’ section.
3. Different Any ACTIVE
The consecutive read can be performed after an interval of no less than 1 cycle to
interrupt the preceding read operation.
IDLE
Precharge the bank without interrupting the preceding read operation. tRP after
the precharge command, issue the ACT command. tRCD after the ACT command,
the consecutive read command can be issued.
out
A0
out
A1
out
B0
out
B1
out
B2
out
B3
CK
/CK
Address
BA
DQ
DQS
Command
t0 t4 t5 t6 t7 t8 t9 t10
Bank0
Active
CL = 3
BL = 4
Bank0
NOP
ACT NOP READ
Row Column A
READ
Column B
Column = A
Read
Column = B
Read
Column = A
Dout
Column = B
Dout
t11
READ to READ Command Interval (same ROW address in the same bank)

IS43R16800A-5TL-TR

Mfr. #:
Manufacturer:
ISSI
Description:
DRAM 128M 2.5v 8Mx16 400MHz
Lifecycle:
New from this manufacturer.
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