NCP13992
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10
Figure 5. Internal Connection of the Brown−out Protection Block
The internal circuitry shown in Figure 5 allows
monitoring the high−voltage input rail (V
bulk
). A
high−impedance resistive divider made of R
upper
and R
lower
resistors brings a portion of the V
bulk
rail to the
VBULK/PFC FB pin. The Current sink (I
BO
) is active below
the bulk voltage turn−on level (V
bulk_ON
). Therefore, the
bulk voltage turn−on level is higher than defined by the
division ratio of the resistive divider. To the contrary, when
the internal BO_OK signal is high, i.e. the application is
running, the I
BO
sink is disabled. The bulk voltage turn−off
threshold (V
bulk_OFF
) is then given by BO comparator
reference voltage directly on the resistor divider. The
advantage of this solution is that the V
bulk_OFF
threshold
precision is not affected by I
BO
hysteresis current sink
tolerance.
The V
bulk_ON
and V
bulk_OFF
levels can be calculated
using equations below:
The I
BO
is ON:
V
BO
) V
BOhyst
+
(eq. 1)
V
bulk_ON
@
R
lower
R
lower
) R
upper
* I
BO
@
ǒ
R
lower
@ R
upper
R
lower
) R
upper
Ǔ
The I
BO
is OFF:
V
BO
+ V
bulk_OFF
@
R
lower
R
lower
) R
upper
(eq. 2)
One can extract R
lower
term from equation 2 and use it in
equation 1 to get needed R
upper
value:
R
lower
+
V
bulk_ON
@V
BO
V
bulk_OFF
* V
BO
* V
BOhyst
I
BO
@ ǒ1 *
V
BO
V
bulk_OFF
Ǔ
(eq. 3)
R
upper
+ R
lower
@
V
bulk_OFF
* V
BO
V
BO
(eq. 4)
Note that the VBULK/PFC FB pin is pulled down by an
internal switch when the controller is in startup phase − i.e.
when the V
CC
voltage ramps up from V
CC
< V
CC_RESET
towards the V
CC_ON
level on the VCC pin. This feature
assures that the VBULK/PFC FB pin voltage will not ramp
up before the IC operation starts. The I
BO
hysteresis current
sink is activated and BO discharge switch is disabled once
the V
CC
voltage crosses V
CC_ON
threshold. The
VBULK/PFC FB pin voltage then ramps up naturally
according to the BO divider information. The BO
comparator then authorizes or disables the LLC stage
operation based on the actual V
bulk
level.
The low I
BO
hysteresis current of the NCP13992 brown
out protection system allows increasing the bulk voltage
divider resistance and thus reduces the application power
consumption during light load operation. On the other hand,
the high impedance divider can be noise sensitive due to
capacitive coupling to HV switching traces in the
application. This is why a filter (
t
BO_FILTR
) is added after the
BO comparator in order to increase the system noise
immunity. Despite the internal filtering, it is also
recommended to keep a good layout for BO divider resistors
and use a small external filtering capacitor on the
VBULK/PFC pin if precise BO detection wants to be
achieved.
The bulk voltage HV divider can be also used by a PFC
front stage controller as a feedback sensing network (refer
again to Figure 5). The shared bulk voltage resistor divider
between PFC and LLC stage offers a way how to further
reduce power losses during no−load operation. The
NCP13992 features a PFC MODE pin that disconnects bias
NCP13992
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11
of the PFC stage during light load or fault mode operation.
This technique further reduces the no−load power
consumption down again since the power losses of voltage
divider are not affected by the bulk voltage at all.
Please refer to Figure 23 through Figure 25 for an
illustration of NCP13992 Brown−out protection system in
all operating conditions/modes.
The VBULK/PFC FB pin voltage is also used by Line
Feed Forward block (LFF). Please refer to ON−time
modulation and feedback loop block description for more
information about LFF function.
Over−voltage and Over−temperature Protection
The OVP/OTP pin is a dedicated input to allow for a
simple and cost effective implementation of two key
protection features that are needed in adapter applications:
over−voltage (OVP) and over−temperature (OTP)
protections. Both of these protections can be either latched
or auto−recovery– depending on the version of NCP13992.
The OVP/OTP pin has two voltage threshold levels of
detection (V
OVP
and V
OTP
) that define a no−fault window.
The controller is allowed to run when OVP/OTP input
voltage is within this working window. The controller stops
the operation, after filter time delay, when the OVP/OTP
input voltage is out of the no−fault window. The controller
then either latches−off or or starts an auto−recovery timer −
depending on the IC version − and triggered the protection
threshold (V
OTP
or V
OVP
).
The internal current source I
OTP
allows a simple OTP
implementation by using a single negative temperature
coefficient (NTC) thermistor. An active soft clamp
composed from V
clamp
and R
clamp
components prevents the
OVP/OTP pin voltage from reaching the V
OVP
threshold
when the pin is pulled up by the I
OTP
current. An external
pull*up current, higher than the pull*down capability of
the internal clamp (V
CLAMP_OVP/OTP
), has to be applied to
pull the OVP/OTP pin above V
OVP
threshold to activate the
OVP protection. The t
OVP_FILTER
and t
OTP_FILTER
filters
are implemented in the system to avoid any false triggering
of the protections due to application noise and/or poor
layout.
Figure 6. Internal Connection of OVP/OTP Input
The OTP protection could be falsely triggered during
controller startup due to the external filtering capacitor
charging current. Thus the t
BLANK_OTP
period has been
implemented in the system to overcome such behavior. The
OTP comparator output is ignored during t
BLANK_OTP
period. In order to speed up the charging of the external
filtering capacitor C
OVP_OTP
connected to OVP/OTP pin,
the I
OTP
current has been doubled to I
OTP_BOOST
. The
maximum value of filtering capacitor is 100 nF.
The OVP/OTP ON signal is set after the following events:
the V
CC
voltage exceeds the V
CC_ON
threshold during
first start−up phase (after VCC pin voltage was below
V
CC_RESET
threshold)
BO OK signal is received from BO block
Auto−recovery timer elapsed and a new restart occurs
IC returns to operation from skip−mode (V
FB_SKIP_IN
+
V
FB_SKIP_HYST
threshold was reached)
The I
OTP
current source is disabled when:
V
CC
falls below V
CC_OFF
threshold
BO OK signal goes to low state (i.e. Brown−out
condition occurs on the mains)
Fault signal is activated (Auto−recovery timer starts
counting or Latch fault is present)
IC goes into the skip−mode operation (V
FB_SKIP_IN
threshold was reached)
IC option that keeps OVP/OTP block working during skip
mode is also available. The IC consumption is increased for
this version by OVP/OTP block bias.
The latched OVP or OTP versions of NCP13992 enters
latched protection mode when V
CC
voltage cycles between
V
CC_ON
and V
CC_OFF
thresholds and no pulses are provided
by drivers. The controller VCC pin voltage has to be cycled
down below V
CC_RESET
threshold in order to restart
operation. This would happen when the power supply is
unplugged from the mains.
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12
PFC MODE Output
The NCP13992 has PFC MODE pin that can be used to
disable or enable PFC stage operation based on actual
application operating state – please refer to Figure 7. The
PFC MODE output pin can be used for two purposes:
1
st
to control the external small signal HV MOSFET switch
that connects the bulk voltage divider to the VBULK/PFC
FB input
2
nd
to control the PFC front stage controller operation via
PFC controller supply pin
Figure 7. Internal Connection of the PFC MODE Block
There are two possible states of the PFC MODE output
that can be placed by the controller based on the application
operating conditions:
a) The PFC MODE output pin is pulled−down by an internal
MOSFET switch before controller startup. This technique
ensures minimum VCC pin current consumption in order to
ramp V
CC
voltage in a short time from the HV startup
current source. This approach speeds up the startup and
restart time of an SMPS. The PFC MODE output pin is also
pulled−down in protection mode during which the HV
startup current source is operated in DSS mode. Application
power consumption is reduced in both above cases.
b) The pull−down switch is disabled and controller connects
VCC pin voltage to PFC MODE output with minimum
dropout (V
PFC_M_ON
).
The PFC MODE pin output current is limited when the
VCC to PFC MODE bypass switch is activated. The current
limitation avoids bypass switch damage during PFC VCC
decoupling capacitor charging process or short circuit. A
minimum value PFC VCC decoupling capacitance should
be used in order to speed up PFC stage startup after it is
enabled by the NCP13992 controller.
Please refer to Figure 23 through Figure 25 for an
illustration of NCP13992 PFC operation control.
ON−time Modulation and Feedback Loop Block
Frequency modulation of today’s commercially available
resonant mode controllers is based on the output voltage
regulator feedback only. The feedback voltage (or current)
of output regulator drives voltage (or current) controlled
oscillator (VCO or CCO) in the controller. This method
presents three main disadvantages:
1
st
− The 2
nd
order pole is present in small signal gain−phase
characteristics => the lower cross over frequency and worse
transient response is imposed by the system when voltage
mode control is used. There is no direct link to the actual
primary current – i.e. no line feed forward mechanism which
results in poor line transient response.
2
nd
– Precise VCO (or CCO) is needed to assure frequency
modulation with good reproducibility, f
min
and f
max
clamps
need to be adjusted for each design => need for an
adjustment pin(s).
3
rd
– Dedicated overload protection system, requiring an
additional pin, is needed to assure application safety during
overload and/or secondary short circuit events.
The NCP13992 resolves all disadvantages mentioned
above by implementing a current mode control scheme that
ensures best transient response performance and provides
inherent cycle−by−cycle over−current protection feature in
the same time. The current mode control principle used in
this device can be seen in Figure 8.

NCP13992AADR2G

Mfr. #:
Manufacturer:
ON Semiconductor
Description:
AC/DC Converters HIGH PERF CURRENT
Lifecycle:
New from this manufacturer.
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