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NCP13992AADR2G

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NCP13992
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16
Dedicated Startup Sequence and Soft−Start
Hard switching conditions can occur in a resonant SMPS
application when the resonant tank operation is started with
50% duty cycle symmetry – refer to Figure 12. This hard
switching appears because the resonant tank initial
conditions are not optimal for the clean startup.
Figure 12. Hard Switching Cycle Appears in the LLC Application
when Resonant Tank is Excited by 50% Duty Cycle during Startup
The initial resonant capacitor voltage level can differ
depending on how long delay was placed before application
operation restart. The resonant capacitor voltage is close to
zero level when application restarts after very long delay –
for example several seconds, when the resonant capacitor is
discharged by leakage to the power stage. However, the
resonant capacitor voltage value can be anywhere between
Vbulk and 0 V when the application restarts operation after
a short period of time – like during periodical SMPS
turn−on/off. Another factor that plays significant role during
resonant power supply startup is the actual load impedance
seen by the power stage during the first pulses of startup
sequence. This impedance is not only defined by resonant
tank components but also by the output loading conditions
and actual output voltage level. The load impedance of
resonant tank is low when the output is loaded and/or the
output voltage is low enough to made secondary rectifies
conducting during first switching cycles of startup phase.
The resonant frequency of the resonant tank is given by the
resonant capacitor capacitance and resonant inductance
−note that the magnetizing inductance does not participate
in resonance in this case. However, if the application
starts−up when the output capacitors is charged and there is
no load connected to the output, the secondary rectification
diodes is not conducting during each switching cycle of
startup sequence and thus the resonant frequency of resonant
tank is affected also by the magnetizing inductance. In this
case, the resonant frequency is much lower than in case of
startup into loaded/discharged output.
These facts show that a clean, hard switching free and
parasitic oscillation free, startup of an LLC converter is not
an easy task, and cannot be achieved by duty cycle
imbalance and/or simple resonant capacitor pre−charge to
Vbulk/2 level. These methods only work in specific startup
conditions.
This explains why the NCP13992 implements a
proprietary startup sequence − see Figure 13 and Figure 14.
The resonant capacitor is discharged down to 0 V before any
application restart − except when restarting from skip mode.
Figure 13. Initial Resonant Capacitor Discharge
before Dedicated Startup Sequence is Placed
NCP13992
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17
Figure 14. Dedicated Startup Sequence Detail
The resonant capacitor discharging process is simply
implemented by activating an internal current limited switch
connected between the HB pin and IC ground – refer to
Figure 13. This technique assures that the resonant capacitor
energy is dissipated in the controller without ringing or
oscillations that could swing the resonant capacitor voltage
to a positive or negative level. The controller detects that the
discharge process is complete via HB pin voltage level
monitoring. The discharge switch is disabled once the HB
pin voltage drops below the V
HB_MIN
threshold.
The dedicated startup sequence continues by activation of
the Mlower driver output for Tl1 period (refer to Figure 14).
This technique ensures that the bootstrap capacitor is fully
charged before the first high−side driver pulse is introduced
by the controller. The first Mupper switch on−time Tup1
period is fixed and depends on the application parameters.
This period can be adjusted internally – various IC options
are available. The Mupper switch is released after T
up1
period and it is not followed by the Mlower switch
activation. The controller waits for a new ZVS condition for
Mupper switch instead and measures actual resonant tank
conditions this way. The Mupper switch is then activated
again after the Mlower blank period is used for measurement
purposes. The second Mupper driver conduction period is
then dependent on the previously measured conditions:
1. The Mupper switch is activated for 3/2 of previous
Mupper conduction period in case the measured
time between previous Mupper turn−off event and
upper ZVS condition detection is twice higher than
the the previous Mupper pulse conduction period
2. The Mupper switch is activated for previous
Mupper conduction period in case the measured
time between previous Mupper turn−off event and
upper ZVS condition detection is twice lower than
the previous Mupper pulse conduction period
The startup period then depends on the previous condition.
Another blank Mlower switch period is placed by the
controller in case condition a) occurred. A normal Mlower
driver pulse, with DC of 50% to previous Mupper DRV
pulse, is placed in case condition b) is fulfilled.
The dedicated startup sequence is placed after the
resonant capacitor is discharged (refer to Figure 13 and
Figure 14) in order to exclude any hard switching cycles
during the startup sequence. The first Mupper switch cycle
in startup phase is always non−ZVS cycle because there is
no energy in the resonant tank to prepare ZVS condition.
However, there is no energy in the resonant tank at this time,
there is also no possibility that the power stage MOSFET
body diodes conducts any current. Thus the hard
commutation of the body diode cannot occur in this case.
The IC will not start and provide regular driver output
pulses until it is placed into the target application, because
the startup sequence cannot be finished until HB pin signal
is detected by the system. The IC features a startup watchdog
timer (t
WATCHDOG
) which activates a dedicated startup
sequence periodically in case the IC is powered without
application (during bench testing) or in case the startup
sequence is not finished correctly. The IC will provide the
first Mlower and first Mupper DRV pulses with a
t
WATCHDOG
off−time in−between startup attempts.
Soft−start
The dedicated startup sequence is complete when
condition b) from previous chapter is fulfilled and the
controller continues operation with the soft−start sequence.
A fully digital non−linear soft−start sequence has been
implemented in NCP13992 using a soft−start counter and
D/A converter that are gradually incremented by the Mlower
driver pulses. A block diagram of the NCP13992 soft−start
system is shown in Figure 15.
NCP13992
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Figure 15. Soft−start Block Internal Implementation
The soft−start block subsystems and operation are
described below:
1. The Soft−Start counter is a unidirectional counter that is
loaded with the last Mupper on−time value that is reached at
the dedicated startup sequence end (i.e. during condition b
occurrence explained in previous chapter). The on−time
period used in the initial period of the soft−start sequence is
affected by the first Mupper on−time period selection and
the dedicated startup sequence processing. The Soft−Start
counter counts up from this initial on time period to its
maximum value which corresponds to the IC maximum
on−time. The Soft−Start counter is incremented by the
soft−start increment number (t
SS_INCREMENT
) during each
Mlower switch on−time period. The soft−start start
increment, selectable via IC option, thus affects the
soft−start time duration. The Mlower clock signal for the
Soft−Start counter can be divided down by the SS clock
divider (K
SS_INCREMENT
) in case the soft−start period needs
to be prolonged further – this can be also done via IC option
selection. The Soft−Start period is terminated (i.e. the
counter is loaded to its maximum) when the FB pin voltage
drops below V
FB_SKIP_IN
level.
2. The ON−time counter is a bidirectional counter that is
used as a main system counter for on−time modulation
during soft−start, normal operation or overload conditions.
The ON−time counter counts−up during Mupper switch
conduction period and then counts down to zero – defining
Mlower switch conduction period. This technique assures
perfect 50% duty cycle symmetry for both power switches
as afore mentioned. The ON−time counter count−up mode
can be switched to the count−down mode by either of two
events: 1
st
when the ON−time counter value reaches the
maximum on−time value (t
TON_MAX
) or 2
nd
when the actual
Mupper on−time is terminated based on the current sense
input information.
4. The Maximum ON−time comparator compares the
actual ON−time counter value with the maximum on−time
value (t
TON_MAX
) and activates the latch (or auto−recovery)
protection mode once IC detect requested number of
TON_MAX events. The minimum operating frequency of
the controller is defined the same way. The Maximum
ON−time comparator reference is loaded by the Soft−Start
counter value on each switching cycle during soft−start. The
Maximum ON−time fault signal is ignored during
Soft−Start operation. The converter Mupper switch on−time
(and thus operating frequency) is thus defined by the
Soft−Start counter value indirectly – via Maximum
ON−time comparator. The Mupper switch on−time is
increased until the Soft−Start counter reaches t
TON_MAX
period and Maximum on−time protection is activated, or
until ON−time comparator takes action and overrides the
Maximum ON−time comparator.
5. The Soft−Start D/A converter generates a soft−start
voltage ramp for ON−time comparator input synchronously
with Soft−Start counter incrementing. The internal FB
signal for ON−time comparator input is artificially
pulled−down and then ramped−up gradually when soft−start
period is placed by the system – refer to Figure 16. The FB
loop is supposed to take over at certain point when
regulation loop is closed and output gets regulated so that
soft−start has no other effect on the on−time modulation.
The Soft−Start counter continues counting−up until it
reaches its maximum value which corresponds to the IC
maximum on−time value – i.e. the IC minimum operating
frequency. The Soft−Start period is terminated (i.e. counter
is loaded to its maximum) when the FB pin voltage drops
below V
FB_SKIP_IN
level. The D/A converter output evolve
accordingly to the Soft−Start counter as it is loaded from its
output data bus.
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NCP13992AADR2G

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Manufacturer:
ON Semiconductor
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AC/DC Converters HIGH PERF CURRENT
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