NCP13992
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19
Figure 16. Soft Start Behavior
The Controller Operation during Soft−start Sequence
Evolves as Follows:
The Soft−Start counter is loaded by last Mupper on−time
value at the end of the dedicated startup sequence. The
ON−time counter is released and starts count−up from zero
until the value that is equal to the actual Soft−Start counter
state. The Mupper switch is active during the time when
ON−time counter counts−up. The Maximum ON−time
comparator then changes counting mode of the ON−time
comparator from count−up to count−down. A dead−time is
placed and the Mlower switch is activated till the ON−time
counter reaches zero value. The Soft−Start counter is
incremented by selected increment during corresponding
Mlower on−time period so that the following Mupper switch
on−time is prolonged automatically – the frequency thus
drops naturally. Because the operating frequency of the
controller drops and Mlower DRV signal is used as a clock
source for the Soft−start counter, the soft−start speed starts
to decrease on each (or on each N−th) Mlower driver pulse
(where N is defined by K
SS_INCREMENT
) of switching cycle.
So we have non−linear soft−start that helps to speed up
output charging in the beginning of the soft−start operation
and reduces the output voltage slope when the output is close
to the regulation level. The output bus of the Soft−Start
counter addresses the D/A converter that defines the
ON−time comparator reference voltage. This reference
voltage thus also increases non−linearly from initial zero
level until the level at which the current mode regulation
starts to work. The on−time of the Mupper and Mlower
switch is then defined by the ON−time comparator action
instead of the Maximum ON−time comparator. The
soft−start then continues until the regulation loop is closed
and the on−time is fully controlled by the secondary
regulator. The Soft−Start counter then continues in counting
and saturates at its maximum possible value which
corresponds to IC minimum operating frequency. The
maximum on−time fault detection system is enabled when
Soft−Start counter value is equal to t
TON_MAX
value.
The previous on−time repetition feature, described above
in the ON−time modulation and feedback loop chapter, is
disabled in the beginning of soft start period. This is because
the ON−time comparator output stays high for several cycles
of soft start period – until the current mode regulation takes
over. The previous on−time repetition feature is enabled
once the current modulation starts to work fully, i.e. in the
time when the ON−time comparator output periodically
drops to low state within actual Mupper switch on−time
period. Typical startup waveform of the LLC application
driven by NCP13992 controller can be seen in Figure 17.
Figure 17. Application Startup with NCP13992 −
Primary Current − Green, V
out
− Magenta
NCP13992
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20
Skip Mode Operation
Then NCP13992 implements proprietary light load and
quiet skip mode operating techniques that improve light load
efficiency, reduce no−load power consumption and
significantly reduce acoustic noise. Controller uses 50%
duty cycle symmetry under full and medium load
conditions. Normal current mode frequency modulation
takes place during this operating mode – refer to on−time
processing section of this datasheet. The 50% duty cycle
symmetry operating mode is replaced by continues
operation with minimum switching patterns repeated after
controlled amount of off−time when load is decreased below
preselected level. Zero voltage switching technique is still
present for the power switches to achieve high light load
efficiency. Quiet skip mode operation is initiated when load
drops further and FB voltage drops below another FB
threshold that is user adjustable on the skip pin. The
frequency of skip burst is regulated by internal digital
controller around preselected quiet skip frequency clamp in
order to reduce acoustic noise. The skip frequency then
drops to very low values during no−load conditions. Refer
to Figure 18, Figure 19 and Figure 20 for typical application
waveforms during light load and quiet skip mode operating
modes.
Figure 18. No−load Operation
Figure 19. Quiet Skip Mode Operation
Figure 20. Light−load Operation
The High Voltage Half−bridge Driver
The driver features a traditional bootstrap circuitry,
requiring an external high voltage diode with resistor in
series for the capacitor refueling path. Minimum series
resistor Rboot value is 3.3 W. Figure 21 shows the internal
architecture of the drivers section. The device incorporates
an upper UVLO circuitry that makes sure enough V
GS
is
available for the upper side MOSFET.
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21
Figure 21. The NCP13992 Internal DRVs Structure
+
Vboot
Mupper
HB
Cboot
Dboot
GND
V
CC
Mlower
HV
UVLO
S
R
Delay
Level
Shifter
Pulse
Trigger
Internal Mupper
dV/dt
detector
dV/dt_P signal
dV/dt_N signal
HB
discharger
HB disch. activation
Rboot
Fault
Internal Mlower
Q
Q
V
CC
aux
The internal dV/dt sensor, connected to the VBOOT pin,
detects the HB pin voltage transitions in order to setup the
optimum DT period – please refer to Dead−Time chapter.
The internal HV discharge switch is connected to the HB pin
and discharges resonant capacitor before application
startup. The current through the switch is regulated to
I
DISCHARGE
level until the V
HB_MIN
threshold voltage is
reached on the HB pin. The discharge system assures always
the same startup conditions for application – regardless of
previous operating state.
As stated in the maximum ratings section, the floating
portion can go up to 620 VDC on the BOOT pin. This
voltage range makes the IC perfectly suitable for offline
applications featuring a 400 V PFC front stage.
Automatic Dead−time Adjust
The dead−time period between the Mupper and Mlower
drivers is always needed in half bridge topologies to prevent
any cross conduction through the power stage MOSFETs
that would result in excessive current, high EMI noise
generation or total destruction of the application. Fixed
dead−time period is often used in the resonant converters
because this approach is simple to implement. However, this
method does not ensure optimum operating conditions in
resonant topologies because the magnetizing current is
changing with line and load conditions. The optimum
dead−time, under a given operating conditions, is equal to
the time that is needed for bridge voltage to transition
between upper and lower states and vice versa – refer to
Figure 22.
Figure 22. Optimum Dead−time Period Adjust
The MOSFET body diode conduction time is minimized
when optimum dead−time period is used which results in
maximum efficiency of a resonant converter power stage.
There are several methods to determine the optimum
dead−time period or to approximate it (for example using
auxiliary winding on main transformer or modulating
dead−time period with operating frequency of the
converter). These approaches however require a dedicated
pin for nominal dead−time adjust or auxiliary winding

NCP13992AADR2G

Mfr. #:
Manufacturer:
ON Semiconductor
Description:
AC/DC Converters HIGH PERF CURRENT
Lifecycle:
New from this manufacturer.
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