CY7C1480V33
Document Number: 38-05283 Rev. *P Page 19 of 25
Package Diagrams
Figure 7. 100-pin TQFP (14 × 20 × 1.4 mm) A100RA Package Outline, 51-85050
51-85050 *E
CY7C1480V33
Document Number: 38-05283 Rev. *P Page 20 of 25
Acronyms Document Conventions
Units of Measure
Acronym Description
BGA Ball Grid Array
CMOS Complementary Metal Oxide Semiconductor
FBGA Fine-Pitch Ball Grid Array
I/O Input/Output
JTAG Joint Test Action Group
LSB Least Significant Bit
MSB Most Significant Bit
OE
Output Enable
SRAM Static Random Access Memory
TAP Test Access Port
TCK Test Clock
TDI Test Data-In
TDO Test Data-Out
TMS Test Mode Select
TQFP Thin Quad Flat Pack
TTL Transistor-Transistor Logic
WE
Write Enable
Symbol Unit of Measure
°C degree Celsius
MHz megahertz
µA microampere
mA milliampere
mm millimeter
ms millisecond
ns nanosecond
ohm
% percent
pF picofarad
Vvolt
Wwatt
CY7C1480V33
Document Number: 38-05283 Rev. *P Page 21 of 25
Errata
This section describes the Ram9 Sync/NoBL ZZ pin, JTAG, and Chip Enable issues. Details include trigger conditions, the devices
affected, proposed workaround and silicon revision applicability. Please contact your local Cypress sales representative if you have
further questions.
Part Numbers Affected
Product Status
All of the devices in the Ram9 72Mb Sync/NoBL family are qualified and available in production quantities.
Ram9 Sync/NoBL ZZ Pin Issues Errata Summary
The following table defines the errata applicable to available Ram9 72Mb Sync/NoBL family devices.
1. ZZ Pin Issue
PROBLEM DEFINITION
The problem occurs only when the device is operated in the normal mode with ZZ pin left floating. The ZZ pin on the SRAM
device does not have an internal pull-down resistor. Switching noise in the system may cause the SRAM to recognize a HIGH
on the ZZ input, which may cause the SRAM to enter sleep mode. This could result in incorrect or undesirable operation of the
SRAM.
TRIGGER CONDITIONS
Device operated with ZZ pin left floating.
SCOPE OF IMPACT
When the ZZ pin is left floating, the device delivers incorrect data.
WORKAROUND
Tie the ZZ pin externally to ground.
FIX STATUS
Fix was done for the 72Mb RAM9 Synchronous SRAMs and 72M RAM9 NoBL SRAMs devices. Fixed devices have a new
revision. The following table lists the devices affected and the new revision after the fix.
Density & Revision Package Type Operating Range
72Mb-Ram9 Synchronous SRAMs: CY7C148*V33 All packages Commercial/Industrial
Item Issues Description Device Fix Status
1. ZZ Pin When asserted HIGH, the ZZ pin places device in
a “sleep” condition with data integrity
preserved.The ZZ pin currently does not have an
internal pull-down resistor and hence cannot be
left floating externally by the user during normal
mode of operation.
72M-Ram9 (90nm) For the 72M Ram9 (90 nm)
devices, this issue was fixed in
the new revision. Please
contact your local sales rep for
availability.
Table 1. List of Affected Devices and the new revision
Revision before the Fix New Revision after the Fix
CY7C148*V33 CY7C148*BV33

CY7C1480V33-200AXC

Mfr. #:
Manufacturer:
Cypress Semiconductor
Description:
SRAM 72MB (2Mx36) 3.3v 200MHz Sync SRAM
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
T/T Paypal Visa MoneyGram Western Union