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CY7C1480V33-200AXC

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24P25-P25
CY7C1480V33
Document Number: 38-05283 Rev. *P Page 22 of 25
Document History Page
Document Title: CY7C1480V33, 72-Mbit (2 M × 36) Pipelined Sync SRAM
Document Number: 38-05283
Rev. ECN No.
Submission
Date
Orig. of
Change
Description of Change
** 114670 08/06/02 PKS New data sheet.
*A 118281 01/21/03 HGK Changed status from Advanced Information to Preliminary.
Updated Features (Removed 300 MHz frequency related information, updated
package offering).
Updated Selection Guide (Removed 300 MHz frequency related information).
Updated Electrical Characteristics (Removed 300 MHz frequency related
information).
Updated Switching Characteristics (Removed 300 MHz frequency related
information, changed maximum value of t
CO
parameter from 2.4 ns to 2.6 ns
for 250 MHz).
Updated Ordering Information (Updated part numbers).
*B 233368 See ECN NJY Updated Features (Removed 250 MHz frequency related information and
included 225 MHz frequency related information).
Updated Functional Description.
Updated Logic Block Diagrams (Corresponding to CY7C1480V33,
CY7C1482V33, CY7C1486V33).
Updated Selection Guide (Removed 250 MHz frequency related information
and included 225 MHz frequency related information).
Updated Functional Overview.
Added Boundary Scan Exit Order (For all packages (Corresponding to
CY7C1480V33, CY7C1482V33, CY7C1486V33)).
Updated Electrical Characteristics (Removed 250 MHz frequency related
information and included 225 MHz frequency related information, replaced the
TBD’s with their respective values for I
DD
, I
SB1
, I
SB2
, I
SB3
and I
SB4
parameters).
Updated Capacitance (Replaced values for all parameters for all Packages).
Updated Thermal Resistance (Replaced values of
JA
and
JC
parameters
from TBD to respective Thermal Values for all Packages).
Updated Switching Characteristics (Removed 250 MHz frequency related
information and included 225 MHz frequency related information).
Updated Switching Waveforms.
Updated Package Diagrams (Changed package outline for 165-ball FBGA
package and 209-ball BGA package, removed 119-BGA package offering).
*C 299452 See ECN SYT Updated Features (Removed 225 MHz frequency related information and
included 250 MHz frequency related information).
Updated Selection Guide (Removed 225 MHz frequency related information
and included 250 MHz frequency related information).
Updated Electrical Characteristics (Removed 225 MHz frequency related
information and included 250 MHz frequency related information).
Updated Thermal Resistance (Changed values of
JA
parameter from
16.8 C/W to 24.63 C/W and
JC
parameter from 3.3 C/W to 2.28 C/W for
100-pin TQFP Package).
Updated Switching Characteristics (Removed 225 MHz frequency related
information and included 250 MHz frequency related information, changed
minimum value of t
CYC
parameter from 4.4 ns to 4.0 ns for 250 MHz frequency).
Updated Ordering Information (Updated part numbers (Added Pb-free
information for 100-pin TQFP, 165-ball FBGA and 209-ball BGA Packages),
added ‘Pb-free BG packages availability’ comment below the Ordering
Information).
CY7C1480V33
Document Number: 38-05283 Rev. *P Page 23 of 25
*D 323080 See ECN PCI Updated Selection Guide (Unshaded 200 MHz and 167 MHz frequency related
information).
Updated Pin Configurations (Modified Address expansion pins/balls in the
pinouts for all packages as per JEDEC standard).
Updated Pin Definitions.
Added Truth Table for Read/Write (Corresponding to CY7C1486V33). Added
Note “BW
x represents any byte write signal BW[0..7].To enable any byte write
BW
x, a Logic LOW signal should be applied at clock rise. Any number of bye
writes can be enabled at the same time for any given write.” and referred the
same note in that table).
Updated Operating Range (Added Industrial Operating Range).
Updated Electrical Characteristics (Unshaded 200 MHz and 167 MHz
frequency related information, Updated test conditions for V
OL,
V
OH
parameters).
Updated Switching Characteristics (Unshaded 200 MHz and 167 MHz
frequency related information).
Updated Ordering Information (Updated part numbers, removed ‘Pb-free BG
packages availability’ comment below the Ordering Information).
*E 416193 See ECN NXR Changed status from Preliminary to Final.
Changed address of Cypress Semiconductor Corporation from “3901 North
First Street” to “198 Champion Court”.
Updated Electrical Characteristics (Updated Note 11 (Changed test condition
from V
IH
< V
DD
to
V
IH
V
DD
), changed “Input Load Current except ZZ and
MODE” to “Input Leakage Current except ZZ and MODE”, changed minimum
value of I
X
parameter (corresponding to Input current of MODE (Input = V
SS
))
from –5 A to –30 A, changed maximum value of I
X
parameter (corresponding
to Input current of MODE (Input = V
DD
)) from 30 A to 5 A respectively,
changed minimum value of I
X
parameter (corresponding to Input current of ZZ
(Input = V
SS
)) from –30 A to –5 A, changed maximum value of I
X
parameter
(corresponding to Input current of ZZ (Input = V
DD
)) from 5 A to 30 A
respectively).
Updated Ordering Information (Updated part numbers, replaced Package
Name column with Package Diagram in the Ordering Information table).
*F 470723 See ECN VKN Updated Maximum Ratings (Added the Maximum Rating for Supply Voltage
on V
DDQ
Relative to GND).
Updated TAP AC Switching Characteristics (Changed minimum value of t
TH
and t
TL
parameters from 25 ns to 20 ns, changed maximum value of t
TDOV
parameter from 5 ns to 10 ns).
Updated Ordering Information (Updated part numbers).
*G 486690 See ECN VKN Updated Pin Configurations (Corrected the typo in the figure 209-ball FBGA
pinout (Corrected the ball name H9 to V
SS
from V
SSQ
)).
*H 1026720 See ECN VKN Updated Pin Definitions (Added Note 3 and referred the same note in V
SSQ
pin).
*I 2898501 03/24/2010 NJY Updated Ordering Information (Removed inactive parts from Ordering
Information table)
Updated Package Diagrams.
*J 3067398 10/20/10 NJY Updated Ordering Information (The part CY7C1480V33-250AXC found to be
in “EOL Prune” state in Oracle PLM is removed from the ordering information
table) and added Ordering Code Definitions.
*K 3257192 05/14/2011 NJY Updated Package Diagrams.
Added Acronyms and Units of Measure.
Updated in new template.
Document History Page (continued)
Document Title: CY7C1480V33, 72-Mbit (2 M × 36) Pipelined Sync SRAM
Document Number: 38-05283
Rev. ECN No.
Submission
Date
Orig. of
Change
Description of Change
CY7C1480V33
Document Number: 38-05283 Rev. *P Page 24 of 25
*L 3596931 04/23/2012 NJY Updated Features (Removed 250 MHz frequency related information, removed
CY7C1482V33, CY7C1486V33 related information, removed 165-ball FBGA
package, 209-ball FBGA package related information).
Updated Functional Description (Removed CY7C1482V33, CY7C1486V33
related information, removed the Note “For best practices recommendations,
please refer to the Cypress application note AN1064, SRAM System
Guidelines.” and its reference).
Updated Selection Guide (Removed 250 MHz frequency related information).
Removed Logic Block Diagram – CY7C1482V33.
Removed Logic Block Diagram – CY7C1486V33.
Updated Pin Configurations (Removed CY7C1482V33, CY7C1486V33 related
information, removed 165-ball FBGA pakcage, 209-ball FBGA package related
information).
Updated Functional Overview (Removed CY7C1482V33, CY7C1486V33
related information).
Updated Truth Table (Removed CY7C1482V33, CY7C1486V33 related
information).
Removed Truth Table for Read/Write (Corresponding to CY7C1482V33,
CY7C1486V33).
Removed IEEE 1149.1 Serial Boundary Scan (JTAG).
Removed TAP Controller State Diagram.
Removed TAP Controller Block Diagram.
Removed TAP Timing.
Removed TAP AC Switching Characteristics.
Removed 3.3 V TAP AC Test Conditions.
Removed 3.3 V TAP AC Output Load Equivalent.
Removed 2.5 V TAP AC Test Conditions.
Removed 2.5 V TAP AC Output Load Equivalent.
Removed TAP DC Electrical Characteristics and Operating Conditions.
Removed Identification Register Definitions.
Removed Scan Register Sizes.
Removed Identification Codes.
Removed Boundary Scan Exit Order (Corresponding to CY7C1480V33,
CY7C1482V33, CY7C1486V33).
Updated Operating Range (Removed Industrial Temperature Range).
Updated Electrical Characteristics (Removed 250 MHz frequency related
information).
Updated Capacitance (Removed 165-ball FBGA pakcage, 209-ball FBGA
package related information).
Updated Thermal Resistance (Removed 165-ball FBGA pakcage, 209-ball
FBGA package related information).
Updated Switching Characteristics (Removed 250 MHz frequency related
information).
Updated Package Diagrams (Removed 165-ball FBGA pakcage (spec
51-85165), 209-ball FBGA package (spec 51-85167) related information).
Replaced all instances of IO with I/O across the document.
*M 3971185 04/23/2013 NJY Added Errata.
Completing Sunset Review.
*N 4033875 06/19/2013 NJY Added Errata Footnotes.
Updated in new template.
*O 4397427 06/03/2014 PRIT Updated Package Diagrams:
spec 51-85050 – Changed revision from *D to *E.
Completing Sunset Review.
*P 4572829 11/18/2014 PRIT Added related documentation hyperlink in page 1.
Document History Page (continued)
Document Title: CY7C1480V33, 72-Mbit (2 M × 36) Pipelined Sync SRAM
Document Number: 38-05283
Rev. ECN No.
Submission
Date
Orig. of
Change
Description of Change
P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24P25-P25

CY7C1480V33-200AXC

Mfr. #:
Buy CY7C1480V33-200AXC
Manufacturer:
Cypress Semiconductor
Description:
SRAM 72MB (2Mx36) 3.3v 200MHz Sync SRAM
Lifecycle:
New from this manufacturer.
Delivery:
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