Operation STM1404
16/36
Figure 9. Power-fail comparator waveform
3.5 Negative-going V
CC
transients and undershoot
The STM1404 devices are relatively immune to negative-going V
CC
transients (glitches).
Figure 23 on page 22 was generated using a negative pulse applied to V
CC
, starting at V
RST
+ 0.3 V and ending below the reset threshold by the magnitude indicated (comparator
overdrive). The graph indicates the maximum pulse width a negative V
CC
transient can have
without causing a reset pulse. As the magnitude of the transient increases (further below the
threshold), the maximum allowable pulse width decreases. Any combination of duration and
overdrive which lies under the curve will NOT generate a reset signal. Typically, a V
CC
transient that goes 100 mV below the reset threshold and lasts 40 µs or less will not cause a
reset pulse. A 0.1 µF bypass capacitor mounted as close as possible to the V
CC
pin
provides additional transient immunity (see Figure 10).
In addition to transients that are caused by normal SRAM operation, power cycling can
generate negative voltage spikes on V
CC
that drive it to values below V
SS
by as much as
one volt. These negative spikes can cause data corruption in the SRAM while in battery
backup mode. To protect from these voltage spikes, STMicroelectronics recommends
connecting a schottky diode from V
CC
to V
SS
(cathode connected to V
CC
, anode to V
SS
).
Schottky diode 1N5817 is recommended for through hole and MBRS120T3 is
recommended for surface mount.
Figure 10. Supply voltage protection
AI08861a
V
CC
V
RST
V
SW
(2.4V)
trec
RST
PFO
PFO follows PFI
PFO follows PFI
AI02169
V
CC
0.1μF DEVICE
V
CC
V
SS
STM1404 Tamper detection
17/36
4 Tamper detection
4.1 Physical
There are four (4) high-impedance physical tamper detect input pins, 2 normally set to high
(NH) and 2 normally set to low (NL). Each input is designed with a glitch immunity (see
Table 7 on page 29). These inputs can be connected externally to several types of actuator
devices (e.g., switches, wire mesh). A tamper on any one of the four inputs that causes its
state to change will trigger the security alarm (SAL
) and drive it to active-low. Once the
tamper condition no longer exists, the SAL
will return to its normal high state.
TP
1
and TP
3
are set normally to high (NH). They are connected externally through a closed
switch or a high-impedance resistor to V
OUT
(in the case of STM1404A or STM1404A) or
V
TPU
(in the case of STM1404B/C), A tamper condition will be detected when the input pin
is pulled low (see Figure 5 and Figure 6 on page 10). If not used, tie the pin to V
OUT
or V
TPU
.
TP
2
and TP
4
are set normally to low (NL). They are connected externally through a high-
impedance resistor or a closed switch to V
SS
. A tamper condition will be detected when the
input pin is pulled high (see Figure 7 and Figure 8 on page 10). If not used, tie the pin to
V
SS
.
4.2 Supply voltage
The internally switched supply voltage, V
INT
(either V
CC
input or V
BAT
input) is continuously
monitored. If V
INT
should exceed the over voltage trip point, V
HV
(set at 4.2V, typical), or
should go below the under voltage trip point, V
LV
(set at 2.0v, typical). SAL will be driven
active-low. Once the tamper condition no longer exists, the SAL
pin will return to its normal
high state.
4.3 Temperature
The STM1404 has a built-in, bandgap-based sensor to monitor the temperature. If a preset
(customer-selectable, factory-programmed) over-temperature trip point (T
H
) or under-
temperature trip point (T
L
) is exceeded, the SAL is asserted low.
When no tamper condition exists, SAL
is normally high (see Section 2: Pin descriptions on
page 11).
When a tamper is detected, the SAL
is activated (driven low), independent of the part type.
V
OUT
can be driven to one of three states, depending on which variant of STM1404 is being
used (see Table 1 on page 1):
ON
High-Z or
Ground (V
SS
)
Note: The STM1404 must be initially powered above V
RST
to enable the tamper detection alarms.
For example, if the battery is on while V
CC
= 0 V, no alarm condition can be detected until
V
CC
rises above V
RST
(and t
rec
expires). From this point on, alarms can be detected either
on battery or V
CC
. This is done to avoid false alarms when the device goes from no power to
its operational state.
Typical operating characteristics STM1404
18/36
5 Typical operating characteristics
Note: Typical values are at T
A
= 25°C.
Figure 11. V
BAT
-to-V
OUt
on-resistance vs. temperature
Figure 12. Supply current vs. temperature (no load)
100
120
140
160
180
200
220
–60 –40 –20 0 20 40 60 80 100 120 140
TEMPERATURE [°C]
V
BAT
- to - V
OUT
ON-RESISTANCE [Ω]
V
BAT
= 2V
V
BAT
= 3V
V
BAT
= 3.3V
V
CC
= 0V
AI09691
0
5
10
15
20
25
30
–50 –40 –30 –20 –10 0 10 20 30 40 50 60 70 80 90 100
TEMPERATURE [°C]
Supply Current [µA]
2.5V
3.3V
3.6V
AI09692

STM1404ATOHQ6F

Mfr. #:
Manufacturer:
STMicroelectronics
Description:
Supervisory Circuits 3V FIPS 140 Security supervisor
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