DC and AC parameters STM1404
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Reset thresholds
V
RST
(9)
Reset threshold
T
V
CC
falling 3.00 3.075 3.15 V
V
CC
rising 3.00 3.085 3.17 V
S
V
CC
falling 2.85 2.925 3.00 V
V
CC
rising 2.85 2.935 3.02 V
R
V
CC
falling 2.55 2.625 2.70 V
V
CC
rising 2.55 2.635 2.72 V
t
rec
RST pulse width 140 200 280 ms
Push-button reset input
t
MLMH
t
MR
MR pulse width 100 ns
t
MLRL
t
MRD
MR to RST output
delay
60 500 ns
1. Valid for ambient operating temperature: T
A
= –40 to 85°C; V
CC
= V
RST
(max) to 3.6 V; and V
BAT
= 2.8 V (except where
noted); typical values are for 3.3 V and 25°C.
2. V
CC
supply current, logic input leakage, push-button reset functionality, PFI functionality, state of RST tested at
V
BAT
= 3.6 V, and V
CC
= 3.6 V. The state of RST and PFO is tested at V
CC
= V
CC
(min). V
BAT
is voltage measured at the
pin.
3. Tested at V
BAT
= 3.6 V, and V
CC
= 0 V.
4. Guaranteed by design.
5. The leakage current measured on the RST
, SAL, PFO, and BLD pins are tested with the output not asserted (output high
impedance).
6. When V
BAT
> V
CC
> V
SW
, V
OUT
remains connected to V
CC
until V
CC
drops below V
SW
.
7. When V
SW
> V
CC
> V
BAT
, V
OUT
remains connected to V
CC
until V
CC
drops below the battery voltage (V
BAT
) – 75 mV.
8. Maximum external capacitive load on V
REF
pin cannot exceed 1 nF.
9. The reset threshold tolerance is wider for V
CC
rising than for V
CC
falling due to the 10 mV (typ) hysteresis, which prevents
internal oscillation.
Table 6. DC and AC characteristics (continued)
Sym
Alter-
native
Description Test condition
(1)
Min Typ Max Unit
