NCP81274
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4
Table 1. PIN FUNCTION DESCRIPTION
Pin
Number
Pin
Name
Pin
Type
Description
1 REFIN I Reference voltage input for output voltage regulation.
2 VREF O 2.0 V output reference voltage. A 10 nF ceramic capacitor is required to connect this pin
to ground.
3 VRMP I Feed-forward input of VIN for the ramp slope compensation. The current fed into this pin
is used to control of the ramp of PWM slope.
4 PWM8/SS I/O PWM 8 output/Soft Start setting. During startup it is used to program the soft start time
with a resistor to ground.
5 PWM7/OCP I/O PWM 7 output/Per OCP setting. During startup it is used to program the OCP level per
phase and latch off time with a resistor to ground.
6 PWM6/LPC1 I/O PWM 6 output/Low phase count 1. During startup it is used to program the power zone
(PSI set low) with a resistor to ground.
7 PWM5/LPC2 I/O PWM 5 output/Low phase count 2. During startup it is used to program boot-up power
zone (PSI set low) with a resistor to ground.
8 PWM4/PHTH1 I/O PWM 4 output/Phase Shedding Threshold 1. During startup it is used to program the
phase shedding threshold 1 (PSI set to mid state) with a resistor to ground.
9 PWM3/PHTH2 I/O PWM 3 output/Phase Shedding Threshold 2. During startup it is used to program the
phase shedding threshold 2 (PSI set to mid state) with a resistor to ground.
10 PWM2/PHTH3 I/O PWM 2 output/Phase Shedding Threshold 3. During startup it is used to program the
phase shedding threshold 3 (PSI set to mid state) with a resistor to ground.
11 PWM1/PHTH4 I/O PWM 1 output/Phase Shedding Threshold 4. During startup it is used to program the
phase shedding threshold 4 (PSI set to mid state) with a resistor to ground.
12 DRON I/O Bidirectional gate driver enable for external drivers.
13 CSP8 I Non-inverting input to current balance sense amplifier for phase 8. Pull-up to VCC to
disable the PWM8 output.
14 CSP7 I Non-inverting input to current balance sense amplifier for phase 7. Pull-up to VCC to
disable the PWM7 output.
15 CSP6 I Non-inverting input to current balance sense amplifier for phase 6. Pull-up to VCC to
disable the PWM6 output.
16 CSP5 I Non-inverting input to current balance sense amplifier for phase 5. Pull-up to VCC to
disable the PWM5 output.
17 CSP4 I Non-inverting input to current balance sense amplifier for phase 4. Pull-up to VCC to
disable the PWM4 output.
18 CSP3 I Non-inverting input to current balance sense amplifier for phase 3. Pull-up to VCC to
disable the PWM3 output.
19 CSP2 I Non-inverting input to current balance sense amplifier for phase 2. Pull-up to VCC to
disable the PWM2 output.
20 CSP1 I Non-inverting input to current balance sense amplifier for phase 1. Pull-up to VCC to
disable the PWM1 output.
21 CSREF I Total output current sense amplifier reference voltage input.
22 CSSUM I Inverting input of total current sense amplifier.
23 CSCOMP O Output of total current sense amplifier.
24 ILIM O Over current shutdown threshold setting output. The threshold is set by a resistor
between ILIM and to CSCOMP pins.
25 IOUT O Total output current. A resistor to GND is required to provide a voltage drop of 2 V at the
maximum output current.
26 LLTH/I2C_ADD I Load line selection from 0% to 100% and I
2
C address pin.
27 FSW I Resistor to ground form this pin sets the operating frequency of the regulator.
28 DIFF O Output of the regulators differential remote sense amplifier.