PIC18F2XJXX/4XJXX FAMILY
DS30009687F-page 10 2008-2015 Microchip Technology Inc.
3.1.2 ICSP™ ROW ERASE
It is possible to erase one row (1024 bytes of data),
provided the block is not code-protected or erase/write-
protected. Rows are located at static boundaries
beginning at program memory address 000000h,
extending to the internal program memory limit. Refer
to Section 2.2 “Memory Maps”).
The Row Erase duration is internally timed. After the
WR bit in EECON1 is set, a NOP instruction is issued,
where the 4th PGC is held high for the duration of the
Row Erase time, P10.
The code sequence to Row Erase a PIC18F2XJXX/
4XJXX Family device is shown in Table 3-2. The
flowchart shown in Figure 3-4 depicts the logic
necessary to completely erase a PIC18F2XJXX/4XJXX
Family device. The timing diagram that details the Row
Erase command and parameter P10 is shown in
Figure 3-3.
TABLE 3-2: ERASE CODE MEMORY CODE SEQUENCE
FIGURE 3-3: SET WR AND START ROW ERASE TIMING
Note 1: If the last row of program memory is
erased, bit 3 of CONFIG1H must also be
programmed as ‘0’.
2: The TBLPTR register can point at any
byte within the row intended for erase.
3: If code protection has been enabled,
ICSP Bulk Erase (all program memory
erased) operations can be used to
disable code protection. ICSP Row Erase
operations cannot be used to disable
code protection.
4-Bit
Command
Data Payload Core Instruction
Step 1: Enable memory writes.
0000 84 A6 BSF EECON1, WREN
Step 2: Point to first row in code memory.
0000
0000
0000
6A F8
6A F7
6A F6
CLRF TBLPTRU
CLRF TBLPTRH
CLRF TBLPTRL
Step 3: Enable erase and erase single row.
0000
0000
0000
88 A6
82 A6
00 00
BSF EECON1, FREE
BSF EECON1, WR
NOP – hold PGC high for time P10.
Step 4: Repeat Step 3, with Address Pointer incremented by 1024, until all rows are erased.
1234
1 2 15 16
123 4
PGC
P5A
PGD
PGD = Input
0
00
0
0
34 65
P10
P5
Row-Erase Time
011
01 0 1 0 0
12
000
16-Bit
Data Payload
0
3
0
P5
4-Bit Command 16-Bit Data Payload
4-Bit Command
2008-2015 Microchip Technology Inc. DS30009687F-page 11
PIC18F2XJXX/4XJXX FAMILY
FIGURE 3-4: SINGLE ROW ERASE CODE MEMORY FLOW
Done
Start
All
Rows
Done?
No
Yes
Addr = 0
Configure
Device for
Row Erase
Addr = Addr + 1024
Start Erase Sequence
and Hold PGC High
for Time P10
PIC18F2XJXX/4XJXX FAMILY
DS30009687F-page 12 2008-2015 Microchip Technology Inc.
3.2 Code Memory Programming
Programming code memory is accomplished by first
loading data into the write buffer and then initiating a
programming sequence. The write buffer for all devices
in the PIC18F2XJXX/4XJXX Family is 64 bytes. It can
be mapped to any 64-byte block beginning at 000000h.
The actual memory write sequence takes the contents
of this buffer and programs the 64-byte block of code
memory indicated by the Table Pointer.
Write buffer locations are not cleared following a write
operation; the buffer retains its data after the write is
complete. This means that the buffer must be written
with 64 bytes on each operation. If there are locations
in the code memory that are to remain empty, the
corresponding locations in the buffer must be filled with
FFFFh. This avoids rewriting old data from the previous
cycle.
The programming duration is internally timed. After a
Start Programming command is issued (4-bit com-
mand, ‘1111’), a NOP is issued, where the 4th PGC is
held high for the duration of the programming time, P9.
The code sequence to program a PIC18F2XJXX/
4XJXX Family device is shown in Table 3-3. The
flowchart shown in Figure 3-5 depicts the logic
necessary to completely write a PIC18F2XJXX/4XJXX
Family device. The timing diagram that details the Start
Programming command and parameter P9 is shown in
Figure 3-6.
TABLE 3-3: WRITE CODE MEMORY CODE SEQUENCE
Note 1: The TBLPTR register must point to the
same region when initiating the
programming sequence as it did when
the write buffers were loaded.
4-Bit
Command
Data Payload Core Instruction
Step 1: Enable writes.
0000 84 A6 BSF EECON1, WREN
Step 2: Load write buffer.
0000
0000
0000
0000
0000
0000
0E <Addr[21:16]>
6E F8
0E <Addr[15:8]>
6E F7
0E <Addr[7:0]>
6E F6
MOVLW <Addr[21:16]>
MOVWF TBLPTRU
MOVLW <Addr[15:8]>
MOVWF TBLPTRH
MOVLW <Addr[7:0]>
MOVWF TBLPTRL
Step 3: Repeat for all but the last two bytes. Any unused locations should be filled with FFFFh.
1101 <MSB><LSB> Write 2 bytes and post-increment address by 2.
Step 4: Load write buffer for last two bytes.
1111
0000
<MSB><LSB>
00 00
Write 2 bytes and start programming.
NOP - hold PGC high for time P9.
To continue writing data, repeat Steps 2 through 4, where the Address Pointer is incremented by 2 at each iteration of the loop.

PIC18F25J50-I/SS

Mfr. #:
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Microchip Technology
Description:
8-bit Microcontrollers - MCU Full Spd USB 32KB Flsh 4KBRAM nanoWatt
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