PIC18F2XJXX/4XJXX FAMILY
DS30009687F-page 18 2008-2015 Microchip Technology Inc.
5.0 CONFIGURATION WORD
The Configuration Words of the PIC18F2XJXX/4XJXX
Family devices are implemented as volatile memory
registers. All of the Configuration registers (CONFIG1L,
CONFIG1H, CONFIG2L, CONFIG2H, CONFIG3L,
CONFIG3H, CONFIG4L, and CONFIG4H) are
automatically loaded following each device Reset.
The data for these registers is taken from the four Flash
Configuration Words located at the end of program
memory. Configuration data is stored in order, starting
with CONFIG1L in the lowest Flash address and
ending with CONFIG4H in the highest. The mapping to
specific Configuration Words is shown in Table 5-1.
Users should always reserve these locations for
Configuration Word data and write their application
code accordingly.
The upper four bits of each Flash Configuration Word
should always be stored in program memory as ‘1111’.
This is done so these program memory addresses will
always be ‘1111 xxxx xxxx xxxx’ and interpreted
as a NOP instruction if they were ever to be executed.
Because the corresponding bits in the Configuration
registers are unimplemented, they will not change the
device’s configuration.
The Configuration and Device ID registers are
summarized in Table 5-2. A listing of the individual
Configuration bits and their options is provided in
Table 5-3.
TABLE 5-1: MAPPING OF THE FLASH
CONFIGURATION WORDS TO
THE CONFIGURATION
REGISTERS
TABLE 5-2: PIC18F45J10 FAMILY DEVICES: CONFIGURATION BITS AND DEVICE IDs
Configuration
Register
Flash
Configuration
Byte
(1)
Configuration
Register
Address
CONFIG1L XFF8h 300000h
CONFIG1H XFF9h 300001h
CONFIG2L XFFAh 300002h
CONFIG2H XFFBh 300003h
CONFIG3L XFFCh 300004h
CONFIG3H XFFDh 300005h
CONFIG4L
(2)
XFFEh 300006h
CONFIG4H
(2)
XFFFh 300007h
Note 1: See Table 2-2 for the complete addresses
within code space for specific devices and
memory sizes.
2: Unimplemented in PIC18F45J10 family
devices.
File Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Default/
Unprogrammed
Value
300000h CONFIG1L DEBUG
XINST STVREN — — — —WDTEN111- ---1
300001h CONFIG1H
—
(1)
—
(1)
—
(1)
—
(1)
—
(2)
CP0 — — ---- 01--
300002h CONFIG2L IESO FCMEN
— — —FOSC2FOSC1FOSC011-- -111
300003h CONFIG2H
—
(1)
—
(1)
—
(1)
—
(1)
WDTPS3 WDTPS2 WDTPS1 WDTPS0 ---- 1111
300005h CONFIG3H
—
(1)
—
(1)
—
(1)
—
(1)
— — —CCP2MX---- ---1
3FFFFEh DEVID1
(3)
DEV2 DEV1 DEV0 REV4 REV3 REV2 REV1 REV0 See Table
3FFFFFh DEVID2
(3)
DEV10 DEV9 DEV8 DEV7 DEV6 DEV5 DEV4 DEV3 See Table
Legend: - = unimplemented. Shaded cells are unimplemented, read as ‘0’.
Note 1: The value of these bits in program memory should always be ‘1’. This ensures that the location is executed as a NOP if
it is accidentally executed.
2: This bit should always be maintained at ‘0’.
3: DEVID registers are read-only and cannot be programmed by the user.