2008-2015 Microchip Technology Inc. DS30009687F-page 7
PIC18F2XJXX/4XJXX FAMILY
2.3 Overview of the Programming
Process
Figure 2-5 shows the high-level overview of the
programming process in which a Bulk Erase is per-
formed first, then the code memory is programmed.
Since only nonvolatile Configuration Words are within
the code memory space, the Configuration Words are
also programmed as code. Code memory (including
the Configuration Words) is then verified to ensure that
programming was successful.
FIGURE 2-5: HIGH-LEVEL
PROGRAMMING FLOW
2.4 Entering and Exiting ICSP™
Program/Verify Mode
Entry into ICSP modes for PIC18F2XJXX/4XJXX Family
devices is somewhat different than previous PIC18
devices. As shown in Figure 2-6, entering ICSP
Program/Verify mode requires three steps:
1. Voltage is briefly applied to the MCLR
pin.
2. A 32-bit key sequence is presented on PGD.
3. Voltage is reapplied to MCLR and held.
The programming voltage applied to MCLR
is VIH, or
essentially, V
DD. There is no minimum time requirement
for holding at V
IH. After VIH is removed, an interval of at
least P19 must elapse before presenting the key
sequence on PGD.
The key sequence is a specific 32-bit pattern,
‘0100 1101 0100 0011 0100 1000 0101 0000’,
which is more easily remembered as 4D434850h in
hexadecimal. The device will enter Program/Verify
mode only if the sequence is valid. The Most Significant
bit of the Most Significant nibble must be shifted in first.
Once the key sequence is complete, V
IH must be
applied to MCLR
and held at that level for as long as
Program/Verify mode is to be maintained. An interval of
at least time, P20 and P12, must elapse before
presenting data on PGD. Signals appearing on PGD
before P12 has elapsed may not be interpreted as valid.
On successful entry, the program memory can be
accessed and programmed in serial fashion. While in
the Program/Verify mode, all unused I/Os are placed in
the high-impedance state.
Exiting Program/Verify mode is done by removing V
IH
from MCLR, as shown in Figure 2-7. The only
requirement for exit is that an interval, P16, should
elapse between the last clock and program signals on
PGC and PGD before removing V
IH.
When V
IH is reapplied to MCLR, the device will enter
the ordinary operational mode and begin executing the
application instructions.
FIGURE 2-6: ENTERING PROGRAM/VERIFY MODE
Start
Done
Perform Bulk
Erase
Program Memory
Verify Program
Done
Enter ICSP™
Exit ICSP™
MCLR
PGD
PGC
VDD
P13
b31 b30 b29 b28 b27 b2 b1 b0b3
...
Program/Verify Entry Code = 4D434850h
P2B
P2A
P19
P20
01001 0000
P12
VIH
VIH
P1
