SC18IS602B All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2017. All rights reserved.
Product data sheet Rev. 6 — 13 October 2017 13 of 26
NXP Semiconductors
SC18IS602B
I
2
C-bus to SPI bridge
7.1.11.3 Input-only configuration
The input-only pin configuration is shown in Figure 17
. It is a Schmitt-triggered input that
also has a glitch suppression circuit.
7.1.11.4 Push-pull output configuration
The push-pull output configuration has the same pull-down structure as both the
open-drain and the quasi-bidirectional output modes but provides a continuous strong
pull-up when the port latch contains a logic 1. The push-pull mode may be used when
more source current is needed from a pin output.
The push-pull pin configuration is shown in Figure 18
.
A push-pull pin has a Schmitt-triggered input that also has a glitch suppression circuit.
Fig 16. Open-drain output configuration
002aab883
V
SS
pin latch data
GPIO pin
glitch rejection
input data
Fig 17. Input-only configuration
002aab884
GPIO pin
glitch rejection
input data
Fig 18. Push-pull output configuration
002aab885
strong
V
DD
P
V
SS
pin latch data
GPIO pin
glitch rejection
input data
N
SC18IS602B All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2017. All rights reserved.
Product data sheet Rev. 6 — 13 October 2017 14 of 26
NXP Semiconductors
SC18IS602B
I
2
C-bus to SPI bridge
7.2 SPI interface
The SPI interface can support Mode 0 through Mode 3 of the SPI specification and can
operate up to 1.8 Mbit/s. The SPI interface uses at least four pins: SPICLK, MOSI, MISO,
and Slave Select (SSn
).
SSn
are the slave select pins. In a typical configuration, an SPI master selects one SPI
device as the current slave.
There are actually four SSn
pins (SS0, SS1, SS2 and SS3) to allow the SC18IS602B to
communicate with multiple SPI devices.
The SC18IS602B generates the SPICLK (SPI clock) signal in order to send and receive
data. The SCLK, MOSI, and MISO are typically tied together between two or more SPI
devices. Data flows from the SC18IS602B (master) to slave on the MOSI pin (Pin 6) and
the data flows from slave to SC18IS602B (master) on the MISO pin (Pin 5).
8. I
2
C-bus to SPI communications example
The following example describes a typical sequence of events required to read the
contents of an SPI-based EEPROM. This example assumes that the SC18IS602B is
configured to respond to address 50h. A START condition is shown as ‘ST’, while a STOP
condition is ‘SP’. The data is presented in hexadecimal format.
1. The first message is used to configure the SPI port for mode and frequency.
ST,50,F0,02,SP SPI frequency 115 kHz using Mode 0
2. An SPI EEPROM first requires that a Write Enable command be sent before data can
be written.
ST,50,04,06,SP EEPROM write enable using SS2, assuming the Write Enable is
06h
3. Clear the interrupt. This is not required if using a polling method rather than interrupts.
ST,50,F1,SP Clear interrupt
4. Write the 8 data bytes. The first byte (Function ID) tells the SC18IS602B which Slave
Select output to use. This example uses SS2 (shown as 04h). The first byte sent to
the EEPROM is normally 02h for the EEPROM write command. The next one or two
bytes represent the subaddress in the EEPROM. In this example, a two-byte
subaddress is used. Bytes 00 and 30 would cause the EEPROM to write to
subaddress 0030h. The next eight bytes are the eight data bytes that will be written to
subaddresses 0030h through 0037h.
ST,50,04,02,00,30,01,02,03,04,05,06,07,08,SP Write 8 bytes using SS2
5. When an interrupt occurs, do a Clear Interrupt or wait until the SC18IS602B responds
to its I
2
C-bus address.
ST,50,F1,SP Clear interrupt
SC18IS602B All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2017. All rights reserved.
Product data sheet Rev. 6 — 13 October 2017 15 of 26
NXP Semiconductors
SC18IS602B
I
2
C-bus to SPI bridge
6. Read the 8 bytes from the EEPROM. Note that we are writing a command, even
though we are going to perform a read from the SPI port. The Function ID is again
04h, indicating that we are going to use SS2. The EEPROM requires that you send a
03h for a read, followed by the subaddress you would like to read. We are going to
read back the same data previously written, so this means that the subaddress should
be 0030h. We would like to read back 8 bytes so we can send eight bytes of FFh to
tell the SC18IS602B to send eight more bytes on MOSI. While it is sending these
eight data bytes, it is also reading the MISO pin and saving the data in the buffer.
ST,50,04,03,00,30,FF,FF,FF,FF,FF,FF,FF,FF,SP Read 8 bytes using SS2
7. The interrupt can be cleared, if needed.
ST,50,F1,SP Clear interrupt
8. Read back the data buffer. Note that we will actually need to read back 11 data bytes
since the first three bytes sent on the SPI port were the read code (03h) and the two
subaddress bytes.
ST,50,00,00,00,01,02,03,04,05,06,07,08,SP Read the data buffer
You can see that on the I
2
C-bus the first four bytes do not contain the data from the
SPI bus. The first byte is the SC18IS602B address, followed by three dummy data
bytes. These dummy data bytes correspond to the three bytes sent to the EEPROM
before it actually places data on the bus (command 03h, subaddress 0030h).
9. Limiting values
[1] This product includes circuitry specifically designed for the protection of its internal devices from the damaging effects of excessive static
charge. Nonetheless, it is suggested that conventional precautions be taken to avoid applying greater than the rated maximum.
[2] Parameters are valid over the operating temperature range unless otherwise specified. All voltages are with respect to V
SS
unless
otherwise noted.
[3] Based on package heat transfer, not device power consumption.
Table 12. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
[1][2]
Symbol Parameter Conditions Min Max Unit
T
amb(bias)
bias ambient temperature operating 55 +125 C
T
stg
storage temperature 65 +150 C
V
n
voltage on any other pin referenced to V
SS
0.5 +5.5 V
I
OH(I/O)
HIGH-level output current per input/output pin - 8 mA
I
OL(I/O)
LOW-level output current per input/output pin - 20 mA
I
I/O(tot)(max)
maximum total I/O current - 120 mA
P
tot
/pack total power dissipation per package
[3]
-1.5W

SC18IS602BIPW/S8HP

Mfr. #:
Manufacturer:
NXP Semiconductors
Description:
I/O Controller Interface IC I2C-bus to SPI Bridge SC18IS602B
Lifecycle:
New from this manufacturer.
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