SC18IS602B All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2017. All rights reserved.
Product data sheet Rev. 6 — 13 October 2017 16 of 26
NXP Semiconductors
SC18IS602B
I
2
C-bus to SPI bridge
10. Static characteristics
[1] Typical ratings are not guaranteed. The values listed are at room temperature, 3 V.
[2] Pin capacitance is characterized but not tested.
[3] Measured with pins in quasi-bidirectional mode.
[4] Measured with pins in high-impedance mode.
[5] Pins in quasi-bidirectional mode with weak pull-up (applies to all pins with pull-ups).
[6] Pins source a transition current when used in quasi-bidirectional mode and externally driven from logic 1 to logic 0. This current is
highest when V
I
is approximately 2 V.
Table 13. Static characteristics
V
DD
= 2.4 V to 3.6 V; T
amb
=
40
Cto+85
C (industrial); unless otherwise specified.
Symbol Parameter Conditions Min Typ
[1]
Max Unit
I
DD(oper)
operating supply current V
DD
= 3.6 V; f = 7.3728 MHz - 5.6 6.7 mA
I
DD(idle)
Idle mode supply current V
DD
= 3.6 V; f = 7.3728 MHz - 3.3 3.9 mA
V
th(HL)
HIGH-LOW threshold voltage Schmitt trigger input 0.22V
DD
0.4V
DD
-V
V
th(LH)
LOW-HIGH threshold voltage Schmitt trigger input - 0.6V
DD
0.7V
DD
V
V
hys
hysteresis voltage - 0.2V
DD
-V
V
OL
LOW-level output voltage all pins
I
OL
=20mA - 0.6 1.0 V
I
OL
=10mA - 0.3 0.5 V
I
OL
=3.2mA - 0.2 0.3 V
V
OH
HIGH-level output voltage all pins
I
OH
= 8mA;
push-pull mode
V
DD
1- - V
I
OH
= 3.2 mA;
push-pull mode
V
DD
0.7 V
DD
0.4 - V
I
OH
= 20 A;
quasi-bidirectional mode
V
DD
0.3 V
DD
0.2 - V
C
ig
input capacitance at gate
[2]
--15pF
I
IL
LOW-level input current logical 0; V
I
=0.4V
[3]
--80 A
I
LI
input leakage current all ports; V
I
=V
IL
or V
IH
[4]
--10 A
I
THL
HIGH-LOW transition current all ports; logical 1-to-0;
V
I
=2.0VatV
DD
=3.6V
[5][6]
30 - 450 A
R
RESET_N(int)
internal pull-up resistance on
pin RESET
10 - 30 k
