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MAX1494CCJ+

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24P25-P27P28-P30P31-P33P34-P34
MAX1492/MAX1494
3.5- and 4.5-Digit, Single-Chip ADCs
with LCD Drivers
______________________________________________________________________________________ 25
Default values: 0000h
The LCD segment-display register 2 is a 16-bit
read/write register. When the SEG_SEL bit (in the con-
trol register) is set to 1, the MAX1492/MAX1494 provide
direct access to individual LCD segments. The bits in
the LCD segment-display register determine if a seg-
ment is on or off. Write a 0 to this register to turn on a
segment and a 1 to turn off a segment.
DP1: Segment DP Driver Bit of Digit 1. The
default value turns on the LCD segment.
E1: Segment e Driver Bit of Digit 1. The
default value turns on the LCD segment.
F1: Segment f Driver Bit of Digit 1. The
default value turns on the LCD segment.
D1: Segment d Driver Bit of Digit 1. The
default value turns on the LCD segment.
G1: Segment g Driver Bit of Digit 1. The
default value turns on the LCD segment.
A1: Segment a Driver Bit of Digit 1. The
default value turns on the LCD segment.
C1: Segment c Driver Bit of Digit 1. The
default value turns on the LCD segment.
B1: Segment b Driver Bit of Digit 1. The
default value turns on the LCD segment.
ANN: Custom Annunciator. The default value
turns on the LCD segment.
DP2: Segment DP Driver Bit of Digit 2. The
default value turns on the LCD segment.
E2: Segment e Driver Bit of Digit 2. The
default value turns on the LCD segment.
F2: Segment f Driver Bit of Digit 2. The
default value turns on the LCD segment.
D2: Segment d Driver Bit of Digit 2. The
default value turns on the LCD segment.
G2: Segment g Driver Bit of Digit 2. The
default value turns on the LCD segment.
A2: Segment a Driver Bit of Digit 2. The
default value turns on the LCD segment.
MSB
LSB
F4 E4
DP4 MINUS B3 C3 A3 G3 D3 F3 E3 DP3
LOW
BATT
B2 C2
0
C2: Segment c Driver Bit of Digit 2. The
default value turns on the LCD segment.
B2: Segment b Driver Bit of Digit 2. The
default value turns on the LCD segment.
LOWBATT: LOWBATT Driver Bit. The default value
turns on the LOWBATT annunciator.
DP3: Segment DP Driver Bit of Digit 3. The
default value turns on the LCD segment.
E3: Segment e Driver Bit of Digit 3. The
default value turns on the LCD segment.
F3: Segment f Driver Bit of Digit 3. The
default value turns on the LCD segment.
D3: Segment d Driver Bit of Digit 3. The
default value turns on the LCD segment.
G3: Segment g Driver Bit of Digit 3. The
default value turns on the LCD segment.
A3: Segment a Driver Bit of Digit 3. The
default value turns on the LCD segment.
C3: Segment c Driver Bit of Digit 3. The
default value turns on the LCD segment.
B3: Segment b Driver Bit of Digit 3. The
default value turns on the LCD segment.
MINUS: Minus-Sign Driver Bit. The default value
turns on the LCD segment.
DP4: Segment DP Driver Bit of Digit 4. The
default value turns on the LCD segment
(MAX1494 only).
E4: Segment e Driver Bit of Digit 4. The
default value turns on the LCD segment
(MAX1494 only).
F4: Segment f Driver Bit of Digit 4. The
default value turns on the LCD segment
(MAX1494 only).
LCD Segment-Display Register 2 (Read/Write):
MAX1492/MAX1494
3.5- and 4.5-Digit, Single-Chip ADCs
with LCD Drivers
26 ______________________________________________________________________________________
Default values: 00h
The LCD segment-display register 3 is an 8-bit
read/write register. When the SEG_SEL bit (in the con-
trol register) is set to 1, the MAX1492/MAX1494 provide
direct access to individual LCD segments. The bits in
the LCD segment-display register determine if a seg-
ment is on or off. Write a 0 to turn on a segment and a 1
to turn off a segment.
MSB
LSB
PEAK HOLD BC_ B4 C4 A4 G4 D4
D4: Segment d Driver Bit of Digit 4. The
default value turns on the LCD segment
(MAX1494 only).
G4: Segment g Driver Bit of Digit 4. The
default value turns on the LCD segment
(MAX1494 only).
A4: Segment a Driver Bit of Digit 4. The
default value turns on the LCD segment
(MAX1494 only).
C4: Segment c Driver Bit of Digit 4. The
default value turns on the LCD segment
(MAX1494 only).
B4: Segment b Driver Bit of Digit 4. The
default value turns on the LCD segment
(MAX1494 only).
BC_: Segment bc_ Driver Bit. For the
MAX1494, this bit enables BC5. For the
MAX1492, this bit enables BC4. The
default value turns on the LCD segment.
HOLD: HOLD-Sign Driver Bit. The default value
turns on the HOLD annunciator.
PEAK: PEAK-Sign Driver Bit. The default value
turns on the PEAK annunciator.
Default values: 0000h
In addition to automatic offset calibration, the
MAX1492/MAX1494 offer a user-defined custom-offset
16-bit read/write register. The final result of the ADC
conversion is the input after autocalibration minus the
value in the custom offset. The custom offset value is
stored in this register. D15 is the MSB. The data is rep-
resented in two’s complement format.
MSB
LSB
D15
D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1
D0
Default values: 0000h
The ADC result-register 1 is a 16-bit read-only register.
This register stores the 16 MSBs of the ADC result. The
data is represented in two’s complement format.
For the MAX1494, the data is 16-bit and D15 is the
MSB. For the MAX1492, the data is 12-bit, D15 is the
MSB, and D4 is the LSB.
MSB
LSB
(MAX1492)
LSB
(MAX1494)
D15
D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1
D0
LCD Segment-Display Register 3 (Read/Write):
ADC Custom Offset-Calibration Register (Read/Write):
ADC Result-Register 1 (Read Only):
MAX1492/MAX1494
3.5- and 4.5-Digit, Single-Chip ADCs
with LCD Drivers
______________________________________________________________________________________ 27
Default values: 0000h
The peak data register is a 16-bit read-only register.
Set the PEAK bit to 1 to enable the PEAK function. This
register stores the peak value of the ADC conversion
result. First, the current ADC result is saved to the
PEAK register. Then, the new ADC conversion result is
compared to this value. If the new value is larger than
the value in the peak register, the MAX1492/MAX1494
save the new value to the peak register. If the new
value is less than the value in the peak register,
the value in the peak register remains unchanged. Set
the PEAK bit to 0 to clear the value in the PEAK regis-
ter. The peak function is only valid for the range of
-19,487 to +19,999 for the MAX1494 and -1217 to
+1999 for the MAX1492.
The data is represented in two’s complement format.
For the MAX1494, the data is 16-bit and D15 is the MSB.
For the MAX1492, the data is 12-bit, D15 is the MSB, and
D4 is the LSB followed by four trailing sub-bits.
Default values: 0000h
The LCD data register is a 16-bit read/write register.
This register updates from the ADC result register 1, the
PEAK register, or from the serial interface by selecting
SPI/ADC bit, PEAK bit, and HOLD bit in the control reg-
ister (Table 6). The data is represented in two’s comple-
ment format.
For the MAX1494, the data is 16-bit and D15 is the MSB.
For the MAX1492, the data is 12-bit, D15 is the MSB,
and D4 is the LSB, followed by four trailing sub-bits.
MSB
LSB
(MAX1492)
LSB
(MAX1494)
D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0
MSB
LSB
(MAX1492)
LSB
(MAX1494)
D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0
MSB LSB
D3D2D1D00000
Default values: 00h
The ADC result-register 2 is an 8-bit read-only register.
This register stores the 4 LSBs of the ADC result. Use
this result with the result in ADC result-register 1 to form
a 20-bit two’s complement conversion result.
LCD Data Register (Read/Write):
PEAK Register (Read Only):
ADC Result-Register 2 (Read Only):
P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24P25-P27P28-P30P31-P33P34-P34

MAX1494CCJ+

Mfr. #:
Buy MAX1494CCJ+
Manufacturer:
Maxim Integrated
Description:
LCD Drivers 4.5 Digit ADC w/LCD Drivers
Lifecycle:
New from this manufacturer.
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