©2013 Silicon Storage Technology, Inc. DS20005054C 04/13
Data Sheet
www.microchip.com
Features
• Single Voltage Read and Write Operations
– 2.7-3.6V
• Serial Interface Architecture
– SPI Compatible: Mode 0 and Mode 3
• High Speed Clock Frequency
– Up to 80 MHz
• Superior Reliability
– Endurance: 100,000 Cycles
– Greater than 100 years Data Retention
• Low Power Consumption:
– Active Read Current: 10 mA (typical)
– Standby Current: 5 µA (typical)
• Flexible Erase Capability
– Uniform 4 KByte sectors
– Uniform 32 KByte overlay blocks
– Uniform 64 KByte overlay blocks
• Fast Erase and Byte-Program:
– Chip-Erase Time: 35 ms (typical)
– Sector-/Block-Erase Time: 18 ms (typical)
– Byte-Program Time: 7 µs (typical)
• Auto Address Increment (AAI) Programming
– Decrease total chip programming time over Byte-Pro-
gram operations
• End-of-Write Detection
– Software polling the BUSY bit in Status Register
– Busy Status readout on SO pin in AAI Mode
• Hold Pin (HOLD#)
– Suspends a serial sequence to the memory
without deselecting the device
• Write Protection (WP#)
– Enables/Disables the Lock-Down function of the status
register
• Software Write Protection
– Write protection through Block-Protection bits in status
register
• Temperature Range
– Commercial: 0°C to +70°C
– Industrial: -40°C to +85°C
• Packages Available
– 8-lead SOIC (150 mils)
– 8-contact WSON (6mm x 5mm)
– 8-contact USON (3mm x 2mm)
• All non-Pb (lead-free) devices are RoHS compliant
2 Mbit SPI Serial Flash
SST25VF020B
The 25 series Serial Flash family features a four-wire, SPI compatible interface
that allows for a low pin-count package which occupies less board space and ulti-
mately lowers total system costs. The SST25VF020B devices are enhanced with
improved operating frequency and even lower power consumption.
SST25VF020B SPI serial flash memories are manufactured with SST proprietary,
high performance CMOS SuperFlash technology. The split-gate cell design and
thick-oxide tunneling injector attain better reliability and manufacturability com-
pared with alternate approaches.
