©2013 Silicon Storage Technology, Inc. DS20005054C 04/13
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2 Mbit SPI Serial Flash
SST25VF020B
Data Sheet
Power-Up Specifications
All functionalities and DC specifications are specified for a V
DD
ramp rate of greater than 1V per 100
ms (0v - 3.0V in less than 300 ms). See Table 15 and Figure 27 for more information.
Figure 27:Power-up Timing Diagram
Table 15: Recommended System Power-up Timings
Symbol Parameter Minimum Units
T
PU-READ
1
1. This parameter is measured only for initial qualification and after a design or process change that could affect this
parameter.
V
DD
Min to Read Operation 100 µs
T
PU-WRITE
1
V
DD
Min to Write Operation 100 µs
T15.0 25054
Time
V
DD
Min
V
DD
Max
V
DD
Device fully accessible
T
PU-READ
T
PU-WRITE
Chip selection is not allowed.
Commands may not be accepted or properly
interpreted by the device.
1417 PwrUp.0
