NCP1910
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33
LLC Soft-Start (SS Pin)
In resonant converter, a soft-start is needed to avoid
suddenly applying the full current into the resonating circuit.
NCP1910 reserves SS pin to fully discharge soft-start
capacitor before re-start and in case of fault conditions:
• LLC brown-out actives,
• t
DEL2
is elapsed, where t
DEL2
timer could be activated
by line brown-out or power good comparator,
• CS/FF pin is above V
CS1
, the fast fault input for LLC,
• V
CC
UVLO,
• PFC UVP,
• Off signal from on/off pin, or
• Thermal Shut-Down (TSD)
When the switch inside SS pin is activated to discharge the
soft-start capacitor, it keeps close until V
SS
is below
V
SS_RST
(150 mV typically). It ensures the full discharge of
soft-start capacitor before re-start, and hence the fresh
soft-start is confirmed.
Once the LLC part starts operation, the internal switch at
SS pin is released open and the empty soft-start capacitor
withdraws current from R
t
pin through soft-start resistor,
R
SS
. This current charges up and soft-start capacitor and
increases the operating frequency of LLC. As the soft-start
capacitor is charged, the LLC driver output frequency
smoothly decreases down to F
min
. Of course, practically, the
feedback loop is supposed to take over the CCO lead as soon
as the output voltage has reached the target.
LLC Skip (Skip Pin, B Version Only)
To avoid any frequency runaway in light conditions but
also to improve the standby power consumption, the
NCP1910B welcomes a skip mode operation (Skip pin)
which permanently observes the opto-coupler collector as
depicted in Figure 60. If skip pin senses a low voltage, it cuts
the LLC output pulses (ML and MU pins) until the collector
goes up again.
+
−
R
t
SS
R
min
R
max
R
SS
C
SS
Feedback
opto−coupler
Skip
V
Skip
Disable ML and
MU
Figure 60. The LLC Skip Mode Configuration
LLC High-Voltage Driver
The NCP1910 includes a high-voltage driver allowing
a direct connection to the upper side MOSFET of LLC
converter. This device also incorporates an upper UVLO
circuitry that makes sure enough gate voltage is available for
the upper side MOSFET. The bias of the floating driver
section is provided by C
boot
capacitor between V
boot
pin and
HB pin that is refilled by external booststrap diode. The
floating portion can go up to 600 Vdc and makes the IC
perfectly suitable for offline applications featuring a 400 V
PFC front-end stage.
Combo Management Section
Start-Up and Stop Delay of LLC and PGout Signal
(t
DEL1
and t
DEL2
)
To ensure the proper operation of LLC, LLC cannot start
if the PFC is not ready.
As depicted in the “PFCok signal” section, the internal
PFCok signal is asserted high when V
bulk
is above 95% of
normal bulk voltage. After PFCok signal is high, a timer
(t
DEL1
) starts to ensure PFC stage is fully stable before LLC
starts. When t
DEL1
is elapsed, PG
out
pin is grounded and
LLC starts its driver outputs (ML and MU pins).
In case of shutdown by unplugging ac input or line brown
out situation, PG
out
signal is released open. And then
another timer (t
DEL2
) starts. Once the t
DEL2
is elapsed, LLC
stops its drivers (ML and MU pins).
Figure 61 depicts the start-up and stop delay of LLC and
PG
out
.
Once the PFC is ready (PFCok is asserted high), t
DEL1
(20 ms typically) is started. Once this delay is elapsed:
• PG
out
pin is asserted low
• LLC drivers (ML and MU pins) can start to operate.
As shutdown by unplug ac input, V
bulk
decreases:
• When it reaches the PG signal, which is adjusted by
PG
adj
pin, PG
out
pin is released open.
