Document Number: 001-89074 Rev. *L Page 20 of 30
PN-SPUR Spur At frequency offsets equal to and greater
than the update rate of the PLL. Input slew
rate 4 V/ns differential 400-mV amplitude.
– – –65 dBc/
Hz
CLKGEN Mode
t
ODC
Output duty cycle Measured at differential signal,
622.08 MHz
45 50 55 %
t
CCJ
Cycle-to-cycle jitter pk, measured at differential signal,
156.25 MHz, over 10-k cycles. Input
frequency (24 MHz to 40 MHz) crystal. (all
differential outputs on)
– – 50 ps
t
PJ
Period jitter pk-pk, measured at differential signal
156.25 MHz, over 10-k cycles. Input
frequency (24 MHz to 40 MHz) crystal. (all
differential outputs on)
– – 50 ps
t
JRMS
RMS phase jitter f
OUT
= 156.25 MHz, 12-k to 20-MHz offset – 0.7 1.0 ps
PNg10k Phase noise, offset = 10 kHz f
OUT
=156.25 MHz. Input reference
25-MHz crystal
– – –110 dBc/
Hz
PNg100k Phase noise, offset = 100 kHz f
OUT
=156.25 MHz. Input reference
25-MHz crystal
– – –119 dBc/
Hz
PNg1M Phase noise, offset = 1 MHz f
OUT
= 156.25 MHz. Input reference
25-MHz crystal
– – –131 dBc/
Hz
PNg10M Phase noise, offset = 10 MHz f
OUT
= 156.25 MHz. Input reference
25-MHz crystal
– – –147 dBc/
Hz
PN-SPUR Spur At frequency offsets equal to and greater
than the update rate of the PLL
– – –65 dBc/
Hz
SSC Mode
t
CCJ
Cycle-to-cycle jitter pk, measured at differential signal,
156.25 MHz, over 10-k cycles. Input
frequency (24 MHz to 40 MHz) crystal,
with a spread of 0.5% (all differential
outputs on).
– – 70 ps
Table 16. AC Electrical Specifications, Differential Output (LVPECL, CML, LVDS)
[1]
(continued)
Symbol Description Conditions Min Typ Max Units
Table 17. AC Electrical Specification HSCL Output
[2, 3]
Symbol Description Conditions Min Typ Max Units
Common AC Electrical Specifications
f
OC
Output frequency HCSL 96 – 400 MHz
E
R
Rising edge rate Measurement taken from differential
waveform, –150 mV to +150 mV
0.6 – 4 V/ns
E
F
Falling edge rate Measurement taken from differential
waveform, –150 mV to +150 mV
0.6 – 4 V/ns
T
STABLE
Time before V
RB
is allowed Measurement taken from differential
waveform, –150 mV to +150 mV
500 – – ps
T
PERIOD_AVG
Average clock period accuracy,
100 MHz
Measurement taken from differential
waveform, Spread Spectrum On, 0.5%
down spread
–300 – 2800 ppm
T
PERIOD_ABS
Absolute period, 100 MHz Measurement taken from differential
waveform, Spread Spectrum On, 0.5%
down spread
9.874 – 10.203 ns
Notes
2. AC parameters for differential outputs are guaranteed for only differential outputs. LVCMOS is Off.
3. All output clocks 100MHz HCSL format. Jitter is from PCIE jitter filter combination that produces the highest jitter.
