12-Bit Capacitance-to-Digital Converter
Data Sheet
AD7152/AD7153
Rev. A Document Feedback
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FEATURES
Capacitance-to-digital converters
Interfaces to floating sensors
Resolution down to 0.25 fF (that is, up to 12 ENOB)
Linearity: 0.05%
Common-mode (not changing) capacitance up to 5 pF
Four capacitance ranges selectable per operation mode
±0.25 pF to ±2 pF in differential mode
0.5 pF to 4 pF in single-ended mode
Tolerant of parasitic capacitance to ground up to 50 pF
Conversion time per channel: 5 ms, 20 ms, 50 ms, and 60 ms
Internal clock oscillator
2-wire serial interface (I
2
C-compatible)
Power
2.7 V to 3.6 V single-supply operation
100 μA current consumption
Operating temperature: −40°C to +85°C
10-lead MSOP
APPLICATIONS
Automotive, industrial, and medical systems for
Pressure measurement
Position sensing
Level sensing
Flowmeters
Humidity sensing
FUNCTIONAL BLOCK DIAGRAMS
DIGITAL
FILTER
12-BIT Σ-
MODULATOR
CLOCK
GENERATOR
VOLTAGE
REFERENCE
AD7152
I
2
C
SERIAL
INTERFACE
07450-001
EXCITATION
EXC2
CIN1(+)
CIN1(–)
CIN2(+)
CIN2(–)
EXC1
SDA
SCL
V
D
D
GND
CONTROL LOGIC
CALIBRATION
CAP+
CAP–
MUX
Figure 1.
DIGITAL
FILTER
12-BIT Σ-
MODULATOR
CLOCK
GENERATOR
VOLTAGE
REFERENCE
AD7153
I
2
C
SERIAL
INTERFACE
07450-002
EXCITATION
CIN1(+)
CIN1(–)
EXC1
SDA
SCL
V
D
D
GND
CONTROL LOGIC
CALIBRATION
CAP+
CAP–
MUX
Figure 2.
GENERAL DESCRIPTION
The AD7152/AD7153 are 12-bit sigma-delta (Σ-Δ) capacitance-to-
digital converters (CDCs). The capacitance to be measured is
connected directly to the device inputs. The architecture features
inherent high resolution (12-bit no missing codes, up to 12-bit
effective resolution) and high linearity (±0.05%). The AD7152/
AD7153 have four capacitance input ranges per operation mode,
±0.25 pF to ±2 pF in differential mode and 0.5 pF to 4 pF in
single-ended mode.
The AD7152/AD7153 can accept up to 5 pF common-mode
capacitance (not changing), which can be balanced by a
programmable on-chip, digital-to-capacitance converter
(CAPDAC).
The AD7153 has one capacitance input channel, while the
AD7152 has two channels. Each channel can be configured
as single-ended or differential. The AD7152/AD7153 are
designed for floating capacitive sensors.
The AD7152/AD7153 have a 2-wire, I
2
C-compatible serial
interface. Both devices can operate with a single power supply
from 2.7 V to 3.6 V. They are specified over the temperature
range of −40°C to +85°C and are available in a 10-lead MSOP.
AD7152/AD7153 Data Sheet
Rev. A | Page 2 of 24
TABLE OF CONTENTS
Features .............................................................................................. 1
Applications ....................................................................................... 1
Functional Block Diagrams ............................................................. 1
General Description ......................................................................... 1
Revision History ............................................................................... 2
Specifications ..................................................................................... 3
Timing Specifications .................................................................. 5
Absolute Maximum Ratings ............................................................ 6
ESD Caution .................................................................................. 6
Pin Configurations and Function Descriptions ........................... 7
Typical Performance Characteristics ............................................. 8
Serial Interface ................................................................................ 11
Write Operation .......................................................................... 11
Read Operation ........................................................................... 11
AD7152/AD7153 Reset .............................................................. 12
General Call................................................................................. 12
Register Map .................................................................................... 13
Status Register ............................................................................. 14
Data Registers ............................................................................. 15
Offset Calibration Registers ...................................................... 15
Gain Calibration Registers ........................................................ 15
CAP Setup Registers .................................................................. 16
Configuration Register .............................................................. 16
CAPDAC POS Register ............................................................. 17
CAPDAC NEG Register ............................................................ 17
Configuration2 Register ............................................................ 17
Circuit Description......................................................................... 18
Capacitance-to-Digital Converter (CDC) .............................. 18
Excitation Source ........................................................................ 18
CAPDAC ..................................................................................... 19
Single-Ended Capacitive Input ................................................. 19
Differential Capacitive Input .................................................... 20
Parasitic Capacitance to Ground .............................................. 20
Parasitic Resistance to Ground ................................................. 20
Parasitic Parallel Resistance ...................................................... 21
Parasitic Serial Resistance ......................................................... 21
Input EMC Protection ............................................................... 21
Power Supply Decoupling and Filtering .................................. 21
Capacitive Gain Calibration ..................................................... 21
Capacitive System Offset Calibration ...................................... 21
Typical Application Diagram .................................................... 22
Outline Dimensions ....................................................................... 23
Ordering Guide .......................................................................... 23
REVISION HISTORY
2/16—Rev. 0 to Rev. A
Change to Address 0x01, Address 0x02 for Channel 1, Address
0x03, Address 0x04 (AD7152 Only) for Channel 2, 16 Bits,
Read-Only, Default Value 0x0000 Section .................................. 15
Updated Outline Dimensions ....................................................... 23
5/08—Revision 0: Initial Versi on
Data Sheet AD7152/AD7153
Rev. A | Page 3 of 24
SPECIFICATIONS
V
DD
= 2.7 V to 3.6 V; GND = 0 V; 40°C to +85°C, unless otherwise noted.
Table 1.
Parameter Min Typ Max Unit
1
Test Conditions/Comments
CAPACITIVE INPUT
Capacitive Input Ranges
±2
pF
Differential mode
±1 pF
±0.5 pF
±0.25 pF
4 pF Single-ended mode
2
pF
1 pF
0.5 pF
Gain Matching Between Ranges ±3 % of FS
Integral Nonlinearity (INL)
2
±0.05 % of FS
No Missing Codes
2
12 Bits
Resolution, p-p
2, 3
10
Bits
25°C, V
DD
= 3.3 V, 4 pF range
Resolution Effective
2, 3
12 Bits 25°C, V
DD
= 3.3 V, 4 pF range
Absolute Error
4
±20 fF
25°C, V
DD
= 3.3 V, after system offset
calibration, ±2 pF range
System Offset Calibration Range
5, 6
40 % of FSR
Offset Deviation over Temperature
2
1 5 fF
Single-ended mode, CIN and EXC
pins disconnected, see Figure 8
0.3 1 fF
Differential mode, CIN and EXC
pins disconnected
Gain Error
7
0.5 % of FSR 25°C, V
DD
= 3.3 V
Gain Deviation over Temperature
2
0.3 0.4 % of FSR See Figure 7
Allowed Capacitance, CIN to GND
2
50
pF
See Figure 9 and Figure 10
Allowed Resistance, CIN to GND
2
10 MΩ See Figure 13
Allowed Serial Resistance
2
20 kΩ See Figure 16
Power Supply Rejection DC 2 fF/V See Figure 17
Normal-Mode Rejection
2
−70 dB 50 Hz ± 1 Hz, conversion time = 60 ms
−70 dB 60 Hz ± 1 Hz, conversion time = 50 ms
Channel-to-Channel Isolation
2
−70 dB AD7152 only
CAPDAC
Full Range 5 6.25 pF
Resolution
8
200 fF 5-bit CAPDAC
Differential Nonlinearity (DNL)
2
0.25 LSB See Figure 18 and Figure 19
Offset Deviation over Temperature
2
0.3 % of CAPDAC FSR Single-ended mode
EXCITATION
Frequency 30.9 32 32.8 kHz
Voltage ±V
DD
/2 V
Allowed Capacitance, EXC to GND
2
300 pF See Figure 11 and Figure 12
SERIAL INTERFACE LOGIC INPUTS (SCL, SDA)
Input High Voltage, V
IH
1.5 V
Input Low Voltage, V
IL
0.8 V
Input Leakage Current (SCL) ±0.1 ±5 µA
OPEN-DRAIN OUTPUT (SDA)
Output Low Voltage, V
OL
0.4 V
I
SINK
= 6.0 mA
Output High Leakage Current, I
OH
0.1 5 µA V
OUT
= V
DD
POWER SUPPLY MONITOR
Threshold Voltage, V
DD
2.45 2.65 V

AD7153BRMZ-REEL

Mfr. #:
Manufacturer:
Analog Devices Inc.
Description:
Data Acquisition ADCs/DACs - Specialized 1-CH 12-bit CDC IC
Lifecycle:
New from this manufacturer.
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