Table 2. DC characteristics (continued)
Symbol C Descriptions Min Typical
1
Max Unit
|I
OZ
| P Hi-Z (off-
state) leakage
current
All input/output (per
pin)
V
IN
= V
DD
or
V
SS
— 0.1 1 µA
|I
OZTOT
| C Total leakage
combined for
all inputs and
Hi-Z pins
All input only and I/O V
IN
= V
DD
or
V
SS
— — 2 µA
R
PU
P Pullup
resistors
All digital inputs,
when enabled (all I/O
pins other than PTB0)
— 30.0 — 50.0 kΩ
R
PU
3
P Pullup
resistors
PTB0 pin — 30.0 — 60.0 kΩ
I
IC
D DC injection
current
4, 5, 6
Single pin limit V
IN
< V
SS
,
V
IN
> V
DD
-0.2 — 2 mA
Total MCU limit,
includes sum of all
stressed pins
-5 — 25
C
In
C Input capacitance, all pins — — — 7 pF
V
RAM
C RAM retention voltage — 2.0 — — V
1. Typical values are measured at 25 °C. Characterized, not tested.
2. Only PTB4, PTB5 support ultra high current output.
3. The specified resistor value is the actual value internal to the device. The pullup value may appear higher when measured
externally on the pin.
4. All functional non-supply pins, except for PTB0, are internally clamped to V
SS
and V
DD
.
5. Input must be current-limited to the value specified. To determine the value of the required current-limiting resistor,
calculate resistance values for positive and negative clamp voltages, then use the large one.
6. Power supply must maintain regulation within operating V
DD
range during instantaneous and operating maximum current
conditions. If the positive injection current (V
In
> V
DD
) is higher than I
DD
, the injection current may flow out of V
DD
and could
result in external power supply going out of regulation. Ensure that external V
DD
load will shunt current higher than
maximum injection current when the MCU is not consuming power, such as no system clock is present, or clock rate is
very low (which would reduce overall power consumption).
Table 3. LVD and POR Specification
Symbol C Description Min Typ Max Unit
V
POR
D POR re-arm voltage
1, 2
1.5 1.75 2.0 V
V
LVDH
C Falling low-voltage detect
threshold - high range (LVDV
= 1)
3
4.2 4.3 4.4 V
V
LVW1H
C Falling low-
voltage
warning
threshold -
high range
Level 1 falling
(LVWV = 00)
4.3 4.4 4.5 V
V
LVW2H
C Level 2 falling
(LVWV = 01)
4.5 4.5 4.6 V
V
LVW3H
C Level 3 falling
(LVWV = 10)
4.6 4.6 4.7 V
V
LVW4H
C Level 4 falling
(LVWV = 11)
4.7 4.7 4.8 V
V
HYSH
C High range low-voltage
detect/warning hysteresis
— 100 — mV
Table continues on the next page...
Nonswitching electrical specifications
MC9S08PA4 Data Sheet, Rev. 8, 08/2018
8 NXP Semiconductors
