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SI8650BC-B-IS1R

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24P25-P27P28-P30P31-P33P34-P36P37-P39P40-P42
10 Rev. 1.6
Si8650/51/52/55
Timing Characteristics
Si865xBx, Ex
Maximum Data Rate 0 — 150 Mbps
Minimum Pulse Width — — 5.0 ns
Propagation Delay t
PHL
, t
PLH
See Figure 2 5.0 8.0 13 ns
Pulse Width Distortion
|t
PLH
–
t
PHL
|
PWD See Figure 2 — 0.2 4.5 ns
Propagation Delay Skew
2
t
PSK(P-P)
—2.04.5ns
Channel-Channel Skew t
PSK
—0.42.5ns
All Models
Output Rise Time t
r
C
L
=15pF
See Figure 2
—
2.5 4.0
ns
Output Fall Time t
f
C
L
=15pF
See Figure 2
—
2.5 4.0
ns
Peak eye diagram jitter t
JIT(PK)
See Figure 7 — 350 — ps
Common Mode Transient
Immunity at Logic Low Output
CMTI V
I
=V
DD
or 0 V 35 50 — kV/µs
Enable to Data Valid t
en1
See Figure 1 — 6.0 11 ns
Enable to Data Tri-State t
en2
See Figure 1 — 8.0 12 ns
Start-Up Time
3
t
SU
—1540µs
Table 3. Electrical Characteristics (Continued)
(V
DD1
= 3.3 V±10%, V
DD2
= 3.3 V±10%, T
A
= –40 to 125 ºC)
Parameter Symbol Test Condition Min Typ Max Unit
Notes:
1. The nominal output impedance of an isolator driver channel is approximately 50 , ±40%, which is a combination of the
value of the on-chip series termination resistor and channel resistance of the output driver FET. When driving loads
where transmission line effects will be a factor, output pins should be appropriately terminated with controlled
impedance PCB traces.
2. t
PSK(P-P)
is the magnitude of the difference in propagation delay times measured between different units operating at
the same supply voltages, load, and ambient temperature.
3. Start-up time is the time period from the application of power to valid data at the output.
Rev. 1.6 11
Si8650/51/52/55
Table 4. Electrical Characteristics
(V
DD1
=2.5V ±5%, V
DD2
= 2.5 V ±5%, T
A
= –40 to 125 ºC)
Parameter Symbol Test Condition Min Typ Max Unit
VDD Undervoltage Threshold VDDUV+ V
DD1
, V
DD2
rising 1.95 2.24 2.375 V
VDD Undervoltage Threshold VDDUV– V
DD1
, V
DD2
falling 1.88 2.16 2.325 V
VDD Negative-Going
Lockout Hysteresis
VDD
HYS
50 70 95 mV
Positive-Going Input Threshold VT+ All inputs rising 1.4 1.67 1.9 V
Negative-Going Input Threshold VT– All inputs falling 1.0 1.23 1.4 V
Input Hysteresis V
HYS
0.38 0.44 0.50 V
High Level Input Voltage V
IH
2.0 — — V
Low Level Input Voltage V
IL
——0.8V
High Level Output Voltage V
OH
loh = –4 mA V
DD1
,V
DD2
–0.4 2.3 — V
Low Level Output Voltage V
OL
lol = 4 mA — 0.2 0.4 V
Input Leakage Current I
L
——±10µA
Output Impedance
1
Z
O
—50—
Enable Input High Current I
ENH
V
ENx
=V
IH
—2.0—µA
Enable Input Low Current I
ENL
V
ENx
=V
IL
—2.0—µA
DC Supply Current (All inputs 0 V or at supply)
Si8650Bx, Ex, Si8655Bx
V
DD1
V
DD2
V
DD1
V
DD2
V
I
= 0(Bx), 1(Ex)
V
I
= 0(Bx), 1(Ex)
V
I
= 1(Bx), 0(Ex)
V
I
= 1(Bx), 0(Ex)
—
—
—
—
1.1
3.1
7.0
3.3
1.8
4.7
9.8
5.0
mA
Si8651Bx, Ex
V
DD1
V
DD2
V
DD1
V
DD2
V
I
= 0(Bx), 1(Ex)
V
I
= 0(Bx), 1(Ex)
V
I
= 1(Bx), 0(Ex)
V
I
= 1(Bx), 0(Ex)
—
—
—
—
1.5
2.7
6.6
4.0
2.4
4.1
9.2
6.0
mA
Si8652Bx, Ex
V
DD1
V
DD2
V
DD1
V
DD2
V
I
= 0(Bx), 1(Ex)
V
I
= 0(Bx), 1(Ex)
V
I
= 1(Bx), 0(Ex)
V
I
= 1(Bx), 0(Ex)
—
—
—
—
2.0
2.4
5.6
5.0
3.0
3.6
7.8
7.5
mA
Notes:
1. The nominal output impedance of an isolator driver channel is approximately 50 , ±40%, which is a combination of the
value of the on-chip series termination resistor and channel resistance of the output driver FET. When driving loads
where transmission line effects will be a factor, output pins should be appropriately terminated with controlled
impedance PCB traces.
2. t
PSK(P-P)
is the magnitude of the difference in propagation delay times measured between different units operating at the
same supply voltages, load, and ambient temperature.
3. Start-up time is the time period from the application of power to valid data at the output.
12 Rev. 1.6
Si8650/51/52/55
1 Mbps Supply Current (All inputs = 500 kHz square wave, CI = 15 pF on all outputs)
Si8650Bx, Ex, Si8655Bx
V
DD1
V
DD2
—
—
4.1
3.7
5.7
5.2
mA
Si8651Bx, Ex
V
DD1
V
DD2
—
—
4.2
3.8
5.8
5.3
mA
Si8652Bx, Ex
V
DD1
V
DD2
—
—
4.0
4.0
5.6
5.6
mA
10 Mbps Supply Current (All inputs = 5 MHz square wave, CI = 15 pF on all outputs)
Si8650Bx, Ex, Si8655Bx
V
DD1
V
DD2
—
—
4.1
4.0
5.7
5.6
mA
Si8651Bx, Ex
V
DD1
V
DD2
—
—
4.2
4.0
5.9
5.6
mA
Si8652Bx, Ex
V
DD1
V
DD2
—
—
4.1
4.2
5.8
5.9
mA
100 Mbps Supply Current (All inputs = 50 MHz square wave, CI = 15 pF on all outputs)
Si8650Bx, Ex, Si8655Bx
V
DD1
V
DD2
—
—
4.1
12.5
5.7
16.2
mA
Si8651Bx, Ex
V
DD1
V
DD2
—
—
6.0
10.8
8.1
14
mA
Si8652Bx, Ex
V
DD1
V
DD2
—
—
7.6
9.3
9.9
12.0
mA
Table 4. Electrical Characteristics (Continued)
(V
DD1
=2.5V ±5%, V
DD2
= 2.5 V ±5%, T
A
= –40 to 125 ºC)
Parameter Symbol Test Condition Min Typ Max Unit
Notes:
1. The nominal output impedance of an isolator driver channel is approximately 50 , ±40%, which is a combination of the
value of the on-chip series termination resistor and channel resistance of the output driver FET. When driving loads
where transmission line effects will be a factor, output pins should be appropriately terminated with controlled
impedance PCB traces.
2. t
PSK(P-P)
is the magnitude of the difference in propagation delay times measured between different units operating at the
same supply voltages, load, and ambient temperature.
3. Start-up time is the time period from the application of power to valid data at the output.
P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24P25-P27P28-P30P31-P33P34-P36P37-P39P40-P42

SI8650BC-B-IS1R

Mfr. #:
Buy SI8650BC-B-IS1R
Manufacturer:
Silicon Labs
Description:
Digital Isolators 3.75 kV 5-channel digital isolator
Lifecycle:
New from this manufacturer.
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