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5L2503-000NVGI

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24P25-P27P28-P29
10©2017 Integrated Device Technology, Inc. October 24, 2017
5L2503 Datasheet
DC Electrical Characteristics for 1.8V LVCMOS
V
DD
= 1.8V ±5%, V
DDOUTx
= 1.8V ±5%, T
A
= -40°C to 85°C.
AC Electrical Characteristics
V
DD1_8
= 1.8V ±5%, V
DDO
= 1.8V ±5%, T
A
= -40°C to 85°C; spread spectrum = off.
Table 18: DC Electrical Characteristics for 1.8V LVCMOS
Symbol Parameter Conditions Minimum Typical Maximum Units
V
OH
Output High Voltage I
OH
= -8mA. 0.7 × V
DDOUTx
V
DDOUTx
V
V
OL
Output Low Voltage I
OL
= 8mA. 0.25 × V
DDOUTx
V
I
OZDD
Output Leakage Current Tri-state outputs,
V
DDOUTx
= 1.89V.
3 μA
V
IH
Input High Voltage Single-ended inputs – OE1,
SDA, SCL.
0.65 × V
DDOUTx
V
DDOUTx
+ 0.3 V
V
IL
Input Low Voltage Single-ended inputs – OE1,
SDA, SCL.
GND - 0.3 0.35 × V
DDOUTx
V
I
IN
Input Leakage Current OE1 -1 5 μA
Table 19. AC Electrical Characteristics
Symbol Parameter Conditions Minimum Typical Maximum Units
f
IN
1
Input Frequency
Input frequency limit when using a crystal. 8 48 MHz
Input frequency limit when using LVCMOS
connected to XIN.
1125MHz
f
OUT
Output Frequency Single-ended clock output limit (LVCMOS). 1 125 MHz
t1 Output Duty Cycle LVCMOS clock < 120MHz. 45 55 %
t2 Rise/Fall Time
Single-ended LVCMOS output clock rise and fall
time, 20% to 80% of V
DDO
1.8V.
1.0
ns
11©2017 Integrated Device Technology, Inc. October 24, 2017
5L2503 Datasheet
1
Practical lower frequency is determined by loop filter settings.
2
Includes loading the configuration bits from OTP to PLL registers. It does not include OTP programming/write time.
3
Actual PLL lock time depends on the loop configuration.
t3
Clock Jitter
Cycle-to-cycle jitter (peak-to-peak), multiple
output frequencies switching, differential outputs
(1.8V nominal output voltage).
OUT1 = 25MHz.
OUT2 = 100MHz.
OUT3 = 125MHz.
50 200 ps
Clock Jitter
Cycle-to-cycle jitter (peak-to-peak), multiple
output frequencies switching, differential outputs
(1.8V nominal output voltage).
OUT1 = 24MHz.
OUT2 = 32.768kHz.
OUT3 = 26MHz.
50 200 ps
Clock Jitter
Cycle-to-cycle jitter (peak-to-peak), multiple
output frequencies switching, differential outputs
(1.8V nominal output voltage).
OUT1 = 32.768kHz.
OUT2 = 26MHz.
OUT3 = 26MHz.
50 200 ps
t5
2
Lock Time PLL lock time from power-up. 20 ms
t6 Lock Time 32.768kHz clock low-power, power-up time. 10 100 ms
t6
3
Lock Time PLL lock time from shutdown mode. 0.1 2 ms
Table 19. AC Electrical Characteristics (Cont.)
Symbol Parameter Conditions Minimum Typical Maximum Units
12©2017 Integrated Device Technology, Inc. October 24, 2017
5L2503 Datasheet
I
2
C Bus Characteristics
1
A device must internally provide a hold time of at least 300ns for the SDA signal (referred to the V
IH(MIN)
of the SCL signal) to bridge the undefined
region of the falling edge of SCL.
Spread Spectrum Generation Specifications
Table 20. I2C Bus DC Characteristics
Symbol Parameter Conditions Minimum Typical Maximum Units
V
IH
Input High Level 0.7 × V
DD1_8
V
V
IL
Input Low Level 0.3 × V
DD1_8
V
V
HYS
Hysteresis of Inputs 0.05 × V
DD1_8
V
I
IN
Input Leakage Current ±1 μA
V
OL
Output Low Voltage I
OL
= 3mA. 0.4 V
Table 21. I
2
C Bus AC Characteristics
Symbol Parameter Conditions Minimum Typical Maximum Units
F
SCLK
Serial Clock Frequency (SCL) 100 400 kHz
t
BUF
Bus Free-time between STOP and START 1.3 μs
t
SU:START
Setup Time, START 0.6 μs
t
HD:START
Hold Time, START 0.6 μs
t
SU:DATA
Setup Time, Data Input (SDA) 100 μs
t
HD:DATA
Hold Time, Data Input (SDA) 1 0 μs
t
OVD
Output Data Valid from Clock 0.9 μs
C
B
Capacitive Load for each Bus Line 400 pF
t
R
Rise Time, Data and Clock (SDA, SCL) 20 + 0.1 × C
B
300 ns
t
F
Fall Time, Data and Clock (SDA, SCL) 20 + 0.1 × C
B
300 ns
t
HIGH
High Time, Clock (SCL) 0.6 μs
t
LOW
Low Time, Clock (SCL) 1.3 μs
t
SU:STOP
Setup Time, STOP 0.6 μs
Table 22: Spread Spectrum Generation Specifications
Symbol Parameter Description Minimum Typical Maximum Units
f
OUT
Output Frequency Output frequency range. 1 125 MHz
f
MOD
Modulation Frequency Modulation frequency. 30 to 63 kHz
f
SPREAD
Spread Value
Amount of spread value
(programmable) – down spread.
-0.5% to -2% %f
OUT
% tolerance Spread% Value Variation of spread range. 15 %
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5L2503-000NVGI

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Clock Generators & Support Products Microclock Programmable Clock Generator
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