SAA7102_SAA7103_4 © Koninklijke Philips Electronics N.V. 2006. All rights reserved.
Product data sheet Rev. 04 — 18 January 2006 58 of 84
Philips Semiconductors
SAA7102; SAA7103
Digital video encoder
Table 75: Horizontal offset register, subaddress 90h, bit description
Bit Symbol Description
7 to 0 XOFS[7:0] with XOFS[9:8] (see
Table 79) horizontal offset; defines the number of
PIXCLKs from horizontal sync (HSVGC) output to composite blanking
(
CBO) output
Table 76: Pixel number register, subaddress 91h, bit description
Bit Symbol Description
7 to 0 XPIX[7:0] with XPIX[9:8] (see
Table 79) pixel in X direction; defines half the number
of active pixels per input line (identical to the length of
CBO pulses)
Table 77: Vertical offset odd register, subaddress 92h, bit description
Bit Symbol Description
7 to 0 YOFSO[7:0] with YOFSO[9:8] (see
Table 79) vertical offset in odd field; defines (in the
odd field) the number of lines from VSVGC to first line with active
CBO; if
no LUT data is requested, the first active
CBO will be output at
YOFSO + 2; usually, YOFSO = YOFSE with the exception of extreme
vertical downscaling and interlacing
Table 78: Vertical offset even register, subaddress 93h, bit description
Bit Symbol Description
7 to 0 YOFSE[7:0] with YOFSE[9:8] (see
Table 79) vertical offset in even field; defines (in the
even field) the number of lines from VSVGC to first line with active
CBO; if
no LUT data is requested, the first active
CBO will be output at
YOFSE + 2; usually, YOFSE = YOFSO with the exception of extreme
vertical downscaling and interlacing
Table 79: MSBs register, subaddress 94h, bit description
Bit Symbol Description
7 and 6 YOFSE[9:8] see
Table 78
5 and 4 YOFSO[9:8] see
Table 77
3 and 2 XPIX[9:8] see
Table 76
1 and 0 XOFS[9:8] see
Table 75
Table 80: Line number register, subaddress 95h, bit description
Bit Symbol Description
7 to 0 YPIX[7:0] with YPIX[9:8] (see
Table 81) defines the number of requested input lines
from the feeding device; number of requested
lines = YPIX + YOFSE − YOFSO
