1©2018 Integrated Device Technology, Inc. March 15, 2018
Description
The 5P49V6965 is a programmable clock generator intended for
high-performance consumer, networking, industrial, computing,
and data-communications applications. Configurations may be
stored in on-chip One-Time Programmable (OTP) memory or
changed using I
2
C interface. This is IDT’s sixth generation of
programmable clock technology (VersaClock 6E).
The frequencies are generated from a single reference clock. The
reference clock can come from one of the two redundant clock
inputs. A glitchless manual switchover function allows one of the
redundant clocks to be selected during normal operation.
Two select pins allow up to four different configurations to be
programmed and accessible using processor GPIOs or
bootstrapping. The different selections may be used for different
operating modes (full function, partial function, partial
power-down), regional standards (US, Japan, Europe) or system
production margin testing.The device may be configured to use
one of two I
2
C addresses to allow multiple devices to be used in a
system.
Typical Applications
▪ Ethernet switch/router
▪ PCI Express 1.0/2.0/3.0
▪ Broadcast video/audio timing
▪ Multi-function printer
▪ Processor and FPGA clocking
▪ Any-frequency clock conversion
▪ MSAN/DSLAM/PON
▪ Fiber Channel, SAN
▪ Telecom line cards
▪ Laser distance sensing
Features
▪ Flexible 1.8V, 2.5V, 3.3V power-rails
▪ High-performance, low phase noise PLL, < 0.5ps RMS typical
phase jitter on outputs
▪ Four banks of internal OTP memory
— In-system or factory programmable
— 2 select pins accessible with processor GPIOs or
bootstrapping
▪ I
2
C serial programming interface
— 0xD0 or 0xD4 I2C address options allows multiple devices
configured in a same system
▪ Reference LVCMOS output clock
▪ Four universal output pairs individually configurable:
— Differential (LVPECL, LVDS or HCSL)
— 2 single-ended (2 LVCMOS in-phase or 180 degrees out of
phase)
—I/O V
DD
s can be mixed and matched, supporting 1.8V
(LVDS and LVCMOS), 2.5V, or 3.3V
▪ Output frequency ranges:
— LVCMOS clock outputs: 1kHz to 200MHz
— LVDS, LVPECL, HCSL differential clock outputs: 1kHz to
350MHz
▪ Redundant clock inputs with manual switchover
▪ Programmable output enable or power-down mode
▪ Available in 4 × 4 mm 24-VFQFPN package
▪ -40° to +85°C industrial temperature operation
Block Diagram
XIN/REF
XOUT
CLKIN
CLKINB
CLKSEL
SD/OE
SEL1/SDA
SEL0/SCL
V
DDA
V
DDD
V
DDO
0
OUT0_SEL_I2CB
V
DDO
1
OUT1
OUT1B
V
DDO
2
OUT2
OUT2B
V
DDO
3
OUT3
OUT3B
V
DDO
4
OUT4
OUT4B
FOD1
FOD2
FOD3
FOD4
PLL
OTP
and
Control
Logic
5P49V6965
Datasheet
VersaClock
®
6E Programmable
Clock Generator
