Philips Semiconductors Product specification
P83C557E4/P80C557E4/P89C557E4Single-chip 8-bit microcontroller
1999 Mar 02
16
PWM1 (FDH) PWM1.7 PWM1.6 PWM1.5 PWM1.4 PWM1.3 PWM1.2 PWM1.1 PWM1.0
Figure 12. Pulse width register PWM1.
76543210
Table 8. Description of PWM1 bits
BIT FUNCTION
PWM1.0 to 7
LOW/HIGH ration of PWM1 signal =
(PWM1)
255 – (PWM1)
Figure 13. Functional Diagram of Pulse Width Modulated Outputs.
Internal Bus
PWM0
f
CLK
8-Bit Comparator
8-Bit Counter
8-Bit Comparator
PWM1
Prescaler1/2
Output
Buffer
PWMP
Output
Buffer
PWM0
PWM1
Philips Semiconductors Product specification
P83C557E4/P80C557E4/P89C557E4Single-chip 8-bit microcontroller
1999 Mar 02
17
6.6 Analog/Digital Converter (ADC)
The P8xC557E4 A/D Converter is a 10-bit, successive
approximation ADC with 8 multiplexed analog input channels. It
additionally contains a high input impedance comparator, a DAC
built with 1024 series resistors and analog switches, registers and
control logic.
Input voltage range is from AV
ref–
(typical 0V) to AV
ref+
(typical +5V).
A set of 8 buffer registers (10-bit) store the conversion results of the
proper analog input channel each.
11 Special Function Registers (SFR) perform the user software
interface to the ADC: a control SFR (ADCON), an analog port
scan-select SFR (ADPSS), 8 input channel related conversion result
SFR with the 8 lower result bits (ADRSL0...ADRSL7), one common
result SFR for the upper 2 result bits (ADRSH). An extra SFR (P5)
allows for reading digital input port data as an alternative function of
the 8 analog input pins.
In order to have a minimum of ADC service overhead in the
microcontroller program, the ADC is able to operate autonomously
within its user configurable autoscan function.
The functional diagram of the ADC is shown in Figure 15.
Feature Overview:
10-bit resolution.
8 multiplexed analog inputs.
Programmable autoscan of the analog inputs.
Bit oriented 8-bit scan-select register to select analog inputs.
Continuous scan or one time scan configurable from 1 to 8 analog
inputs.
Start of a conversion by software or with an external signal.
Eight 10-bit buffer registers, one register for each analog input
channel.
Interrupt request after one channel scan loop.
Programmable prescaler (dividing by 2, 4, 6, 8) to adapt to
different system clock frequencies.
Conversion time for one A/D conversion: 15 µs ... 50 µs
Differential non-linearity : DLe ±1 LSB.
Integral non-linearity : ILe ±2 LSB.
Offset error : OSe ±2LSB.
Gain error : Ge ±0.4 %.
Absolute voltage error : Ae ±3 LSB.
Channel to channel matching : Mctc ±1LSB.
Crosstalk between analog inputs : Ct < –60dB. @100 kHz.
Monotonic and no missing codes.
Separated analog (AV
DD
, AV
SS
) and digital (V
DD
, V
SS
) supply
voltages.
Reference voltage at two special pins : AV
REF–
and AV
REF+
.
For further information on the ADC characteristics, refer to the
“DC CHARACTERISTICS” section.
6.1.1 Functional description:
Table 9. A/D Special Function Registers
SYMBOL NAME ACCESS
ADCON A/D control register read/write
ADPSS Analog port scan-select register read/write
ADRSLn 8 A/D result registers, the 8 lower bits (n: 0...7) read only
ADRSH A/D result register, the 2 higher bits read only
P5 Digital input port (shared with analog inputs) read only
A/D Control Register ADCON
The Special Function Register ADCON contains control and status
bits for the A/D Converter peripheral block. The reset value of
ADCON is (00000000). Its hardware address is D7H. ADCON is not
bit addressable.
76543210
ADCON (D7H) ADPR1 ADPR0 ADPOS ADINT ADSST ADCSA ADSRE ADSFE
Figure 14. ADC control register.
Philips Semiconductors Product specification
P83C557E4/P80C557E4/P89C557E4Single-chip 8-bit microcontroller
1999 Mar 02
18
Figure 15. Functional diagram of AD converter.
+
88
8
8
2
2
10
10
10
COMPARATOR SAR
DAC
8x
10–bit result
registers
SCAN LOGIC
ADPSS ADCON
2 LATCHES
Read
ADRSH
Read
ADRSL
n
ANALOG
Mux.
ADC0
ADC7
AV
ref+
AV
ref–
AV
DD1
AV
SS1
ADEXS
INTERNAL BUS
Table 10. Description of ADCON bits
SYMBOL BIT FUNCTION
ADCON.7 ADPR1 Control bit for the prescaler.
ADCON.6 ADPR0 Control bit for the prescaler.
ADPR1=0 ADPR0=0 Prescaler divides by 2 (default by reset)
ADPR1=0 ADPR0=1 Prescaler divides by 4
ADPR1=1 ADPR0=0 Prescaler divides by 6
ADPR1=1 ADPR0=1 Prescaler divides by 8
ADCON.5 ADPOS ADPOS is reserved for future use. Must be ’0’ if ADCON is written.
ADCON.4 ADINT ADC interrupt flag. This flag is set when all selected analog inputs are converted, as well in continuous
scan as in one-time scan mode. An interrupt is invoked if this interrupt is enabled. ADINT must be cleared
by software. It cannot be set by software.
ADCON.3 ADSST ADC start and status. Setting this bit by software or by hardware (via ADEXS input) starts the A/D
conversion of the selected analog inputs. ADSST stays a ‘one’ in continuous scan mode. In one-time scan
mode, ADSST is cleared by hardware when the last selected analog input channel has been converted. As
long as ADSST is ’1’, new start commands to the ADC-block are ignored.
An A/D conversion in progress is aborted if ADSST is cleared by software.
ADCON.2 ADCSA 1 = Continuous scan of the selected analog inputs after a start of an A/D conversion.
0 = One-time scan of the selected analog inputs after a start of an A/D conversion.
ADCON.1 ADSRE 1 = A rising edge at input ADEXS will start the A/D conversion and generate a capture signal.
0 = A rising edge at input ADEXS has no effect.
ADCON.0 ADSFE 1 = A falling edge at input ADEXS will start the A/D conversion and generate a capture signal.
0 = A falling edge at input ADEXS has no effect.

P80C557E4EFB/01,55

Mfr. #:
Manufacturer:
NXP Semiconductors
Description:
IC MCU 8BIT ROMLESS 80QFP
Lifecycle:
New from this manufacturer.
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