Philips Semiconductors Product specification
P83C557E4/P80C557E4/P89C557E4Single-chip 8-bit microcontroller
1999 Mar 02
22
When Timer 0 is in Mode 3, Timer 1 can be programmed to operate
in Modes 0, 1 or 2 but cannot set an interrupt request flag or
generate an interrupt. However the overflow from Timer 1 can be
used to pulse the serial port baud-rate generator.
With a 16 MHz crystal, the counting frequency of these
timer/counters is as follows:
In the timer function, the timer is incremented at a frequency of
1.33 MHz – a division by 12 of the system clock frequency
0 Hz to an upper limit of 0.66 MHz (1/24 of the system clock
frequency) when programmed for external inputs
Both internal and external inputs can be gated to the counter by a
second external source for directly measuring pulse durations.
When configured as a counter, the register is incremented on every
falling edge on the corresponding input pin, T0 or T1. The
incremented register value can be read earliest during the second
machine cycle after that one, during which the incrementing pulse
occurred.
The counters are started and stopped under software control. Each
one sets its interrupt request flag when it overflows from all HIGHs
to all LOWs (or automatic reload value), with the exception of mode
3 as previously described.
Figure 19. Timer/Counter mode control (TMOD) register.
76543210
TMOD (89H) GATE C/T M1 M0 GATE C/T M1 M0
Timer 1
Timer 0
Table 12. Description of TMOD bits
SYMBOL BIT FUNCTION
Gate TMOD.7
TMOD.3
Gating control when set. Timer/Counter “x” is enabled only while “INTx” pin is high and “TRx” control pin is set.
When cleared Timer “x” is enabled whenever “TRx” control bit is set.
C/T TMOD.6
TMOD.2
Timer or Counter Selector cleared for Timer operation (input from internal system clock). Set for Counter
operation (input from “Tx” input pin).
M1
M0
TMOD.5
TMOD.1
TMOD.4
TMOD.0
Timer 0, Timer 1 mode select see Table 13.
Table 13. Timer 0 / Timer 1 operation select
M1 M0 OPERATING
0 0 8048 Timer “TLx” serves as 5-bit prescaler.
0 1 16-bit Timer/Counter “THx” and “TLx” are cascaded; there is no prescaler.
1 0 8-bit auto-reload Timer/Counter “THx” holds a value which is to be reloaded into “TLx” each time it overflows.
1 1 (Timer 0) TL0 is an 8-bit Timer/Counter controlled by the standard Timer 0 control bits. TH0 is an 8-bit timer
only controlled by Timer 1 control bits.
1 1 (Timer 1) Timer/Counter 1 stopped.
Philips Semiconductors Product specification
P83C557E4/P80C557E4/P89C557E4Single-chip 8-bit microcontroller
1999 Mar 02
23
Figure 20. Timer/Counter mode control (TCON) register.
76543210
TCON (88H) TF1 TR1 TF0 TR0 IE1 IT1 IE0 IT0
Table 14. Description of TCON bits
SYMBOL BIT FUNCTION
TF1 TCON.7 Timer 1 overflow flag. Set by hardware on Timer/Counter overflow. Cleared by hardware when processor
vectors to interrupt routine.
TR1 TCON.6 Timer 1 run control bit. Set/cleared by software to turn Timer/Counter on/off.
TF0 TCON.5 Timer 0 overflow flag. Set by hardware on Timer/Counter overflow. Cleared by hardware when processor
vectors to interrupt routine.
TR0 TCON.4 Timer 0 run control bit. Set/cleared by software to turn Timer/Counter on/off.
IE1 TCON.3 Interrupt 1 edge flag. Set by hardware when external interrupt edge detected. Cleared when interrupt
processed.
IT1 TCON.2 Interrupt 1 type control bit. Set/cleared by software to specify falling edge/low level triggered external interrupts.
IE0 TCON.1 Interrupt 0 edge flag. Set by hardware when external interrupt edge detected. Cleared when interrupt
processed.
IT0 TCON.0 Interrupt 0 type control bit. Set/cleared by software to specify falling edge/low level triggered external interrupts.
Philips Semiconductors Product specification
P83C557E4/P80C557E4/P89C557E4Single-chip 8-bit microcontroller
1999 Mar 02
24
6.7.2 Timer T2
Timer T2 is a 16 bit timer/counter which has capture and compare
facilities. The operational diagram is shown in Figure 21.
The 16 bit timer/counter is clocked via a prescaler with a
programmable division factor of 1, 2, 4 or 8. The input of the
prescaler is clocked with 1/12 of the clock frequency, or by an
external source connected to the T2 input, or it is switched off. The
maximum repetition rate of the external clock source is f
CLK
/12,
twice that of Timer 0 and Timer 1. The prescaler is incremented on a
rising edge. It is cleared if its division factor or its input source is
changed, or if the timer/counter is reset (see also Figure 22:
TM2CON). T2 is readable ’on the fly’, without any extra read
latches; this means that software precautions have to be taken
against misinterpretation at overflow from least to most significant
byte while T2 is being read. T2 is not loadable and is reset by the
RST signal or at the positive edge of the input signal RT2, if
enabled. In the Idle or Power-down Mode the timer/counter and
prescaler are reset and halted.
T2 is connected to four 16-bit Capture Registers: CT0, CT1, CT2
and CT3. A rising or falling edge on the inputs CT0I, CT1I, CT2I or
CT3I (alternative function of Port 1) results in loading the contents of
T2 into the respective Capture Registers and an interrupt request.
Using the Capture Register CTCON (see Figure 23), these inputs
may invoke capture and interrupt request on a positive, a negative
edge or on both edges. If neither a positive nor a negative edge is
selected for capture input, no capture or interrupt request can be
generated by this input.
INTINT
Figure 21. Block diagram of Timer 2.
CT0 CT1 CT2 CT3
CTI0
INTCT0I
CTI1
CT1I
CTI2
CT2I
CTI3
CT3I
1/12
Prescaler T2 Counter
8-bit overflow interrupt
16-bit overflow interrupt
External reset
enable
off
f
CLK
T2
RT2
T2ER
COMP
CMO (S)
INT
COMP
CM1 (R)
INT
COMP
CM2 (T)
INT
P4.0
P4.1
P4.2
P4.3
P4.4
P4.5
P4.6
P4.7
R
R
R
R
R
R
T
T
S
S
S
S
S
S
TG
TG
STE RTE
I/O port 4
S = set
R = reset
T = toggle
TG = toggle status
T2 SFR address: TML2 = lower 8 bits
TMH2 = higher 8 bits
INT

P80C557E4EFB/01,55

Mfr. #:
Manufacturer:
NXP Semiconductors
Description:
IC MCU 8BIT ROMLESS 80QFP
Lifecycle:
New from this manufacturer.
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