M41T00AUD M41T00AUD clock operation
Doc ID 13480 Rev 5 19/42
Table 4. M41T00AUD register map
(1)
Addr
Bit
Register name Range
D7 D6 D5 D4 D3 D2 D1 D0
00h ST 10 seconds Seconds Seconds 00-59
01h
0
(2)
10 minutes Minutes Minutes 00-59
02h CEB CB 10 hours Hours (24 hour format) Century/hours 0-1/00-23
03h 0 Y
(3)
YY 0 Day of week Day 1-7
04h 0 0 10 date Date: day of month Date 01-31
05h 0 0 0 10M Month Month 01-12
06h 10 years Year Year 00-99
07h OUT FT S <------------- Calibration ------------> Cal/control
08h 256/512 TONE TCH2 MUTE <--------------GAIN ------------> Audio
09h HT TCFE OF OFIE TCHE3 TCHE2 TCHE1 TCHE0 Control2
1. Key:
S = SIGN bit
FT = Frequency test bit
ST = STOP bit
OF = Oscillator fail detect flag
OFIE = Oscillator fail interrupt enable
OUT = Logic output
TCHE3:TCHEO = Trickle charge enable bits
TCFE = Trickle charge FET bypass enable
HT = Halt bit
TCH2 = Trickle charge enable #2
TONE = Tone on/off select
CB = Century bit
CEB = Century enable bit
256/512 = Tone frequency select bit
2. 0 bits always read as 0. Writing them has no effect.
3. Y bits are indeterminate at power-up. These are the factory test mode bits, and must be written to 0.
M41T00AUD clock operation M41T00AUD
20/42 Doc ID 13480 Rev 5
Figure 12. Counter update diagram
32KHz
COUNTER
DIVIDE BY
1 Hz
SECONDS
MINUTES
HOURS
MONTHS
YEARS
CENTURIES
COUNTER
COUNTER
COUNTER
COUNTER
COUNTER
COUNTER
REGISTER
REGISTER
REGISTER
REGISTER
DAY
DATE
REGISTER
REGISTER
REGISTER
READ/WRITE
BUFFER
TRANSFER
REGISTERS
SERIAL
TRANSFER
REGISTER
ai13329
1
2
C SERIAL BUS
32768
OSC
M41T00AUD M41T00AUD clock operation
Doc ID 13480 Rev 5 21/42
5.3 Priority for IRQ/FT/OUT pin
Three functions share pin 5 of the M41T00AUD. The oscillator fail interrupt (IRQ), the
calibration frequency test output (FT) and the discrete logic output (OUT) all use this pin.
In normal operation, when operating from V
CC
, the interrupt function has priority over the
frequency test function which in turn has priority over the discrete output function.
In the backup mode, when operating from V
BACK
, the priorities are different. The interrupt
and frequency test functions are disabled, and only the discrete output function can be
used.
When operating from V
CC
, if the oscillator fail interrupt enable bit is set (OFIE, D4 of register
09h), the pin is an interrupt output which will be asserted anytime the OF bit (D5 of register
09h) goes true. (See Section 5 for more details.)
During calibration, the pin can be used as a frequency test output. When FT is a 1 (and
OFIE a 0), the device will output a 512 Hz test signal on this pin. Users can measure this
with a frequency counter and use that result to determine the appropriate calibration register
value.
Otherwise, when OFIE is a 0 and FT is a 0, it becomes the discrete logic OUT pin and
reflects the value of the OUT bit (D7 of register 07h).
When operating from V
BACK
, the discrete output function can still be used. The
IRQ
/FT/OUT pin will reflect the contents of the out bit.
Note: The IRQ
/FT/OUT pin is open drain and requires an external pull-up resistor.
Table 5. Priority for IRQ/FT/OUT pin
State
Register bits
IRQ/FT/OUT pin
OFIE FT OUT
On V
CC
1X X OF
0 1 X 512 Hertz
00 1 1
00 0 0
On V
BACK
XX 1 1
XX 0 0

M41T00AUDD1F

Mfr. #:
Manufacturer:
STMicroelectronics
Description:
Real Time Clock SERIAL RTC W/AUDIO
Lifecycle:
New from this manufacturer.
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