P89LPC914FDH,129 Datasheet P89LPC914FDH,129, P89LPC913FDH,129, P89LPC912FDH,129 | P19-P21

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Product data sheet Rev. 05 — 28 September 2007 19 of 66

NXP Semiconductors

P89LPC912/913/914

8-bit microcontrollers with two-clock 80C51 core

[1] All ports are in input only (high impedance) state after power-up.

[2] The RSTSRC register reﬂects the cause of the P89LPC912 reset. Upon a power-up reset, all reset source ﬂags are cleared except POF and BOF; the power-on reset value is

xx11 0000.

[3] After reset, the value is 1110 01x1, i.e., PRE2 to PRE0 are all logic 1, WDRUN = 1 and WDCLK = 1. WDTOF bit is logic 1 after watchdog reset and is logic 0 after power-on reset.

Other resets will not affect WDTOF.

[4] On power-on reset, the TRIM SFR is initialized with a factory preprogrammed value. Other resets will not cause initialization of the TRIM register.

[5] The only reset source that affects these SFRs is power-on reset.

RTCL Real-time clock register low D3H 00

[5]

0000 0000

SP Stack pointer 81H 07 0000 0111

SPCTL SPI control register E2H SSIG SPEN DORD MSTR CPOL CPHA SPR1 SPR0 04 0000 0100

SPSTAT SPI status register E1H SPIF WCOL ------0000xx xxxx

SPDAT SPI data register E3H 00 0000 0000

TAMOD Timer 0 and 1 auxiliary mode 8FH -------T0M2 00 xxx0 xxx0

Bit address 8F 8E 8D 8C 8B 8A 89 88

TCON* Timer 0 and 1 control 88H TF1 TR1 TF0 TR0 ----000000 0000

TH0 Timer 0 high 8CH 00 0000 0000

TH1 Timer 1 high 8DH 00 0000 0000

TL0 Timer 0 low 8AH 00 0000 0000

TL1 Timer 1 low 8BH 00 0000 0000

TMOD Timer 0 and 1 mode 89H - - T1M1 T1M0 T0GATE T0C/T T0M1 T0M0 00 0000 0000

TRIM Internal oscillator trim register 96H - ENCLK TRIM.5 TRIM.4 TRIM.3 TRIM.2 TRIM.1 TRIM.0

[4] [5]

WDCON Watchdog control register A7H PRE2 PRE1 PRE0 - - WDRUN WDTOF WDCLK

[3] [5]

WDL Watchdog load C1H FF 1111 1111

WFEED1 Watchdog feed 1 C2H

WFEED2 Watchdog feed 2 C3H

Table 7. P89LPC912 Special function registers

…continued

* indicates SFRs that are bit addressable.

Name Description SFR

addr.

Bit functions and addresses Reset value

MSB LSB Hex Binary

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Product data sheet Rev. 05 — 28 September 2007 20 of 66

NXP Semiconductors

P89LPC912/913/914

8-bit microcontrollers with two-clock 80C51 core

Table 8. P89LPC913 Special function registers

* indicates SFRs that are bit addressable.

Name Description SFR

addr.

Bit functions and addresses Reset value

MSB LSB Hex Binary

Bit address E7 E6 E5 E4 E3 E2 E1 E0

ACC* Accumulator E0H 00 0000 0000

AUXR1 Auxiliary function register A2H CLKLP EBRR - - SRST 0 - DPS 00

[1]

0000 00x0

Bit address F7 F6 F5 F4 F3 F2 F1 F0

B* B register F0H 00 0000 0000

BRGR0

[2]

Baud rate generator rate low BEH 00 0000 0000

BRGR1

[2]

Baud rate generator rate high BFH 00 0000 0000

BRGCON Baud rate generator control BDH ------SBRGS BRGEN 00

[6]

xxxx xx00

CMP1 Comparator 1 control register ACH - - CE1 - CN1 OE1 CO1 CMF1 00

[1]

xx00 0000

CMP2 Comparator 2 control register ADH - - CE2 - CN2 - - CMF2 00

[1]

xx00 0000

DIVM CPU clock divide-by-M

control

95H 00 0000 0000

DPTR Data pointer (2 bytes)

DPH Data pointer high 83H 00 0000 0000

DPL Data pointer low 82H 00 0000 0000

FMADRH Program ﬂash address high E7H ------ 000000 0000

FMADRL Program ﬂash address low E6H 00 0000 0000

FMCON Program ﬂash control (Read) E4H BUSY - - - HVA HVE SV OI 70 0111 0000

Program ﬂash control (Write) FMCMD.

FMCMD.

FMDATA Program ﬂash data E5H 00 0000 0000

Bit address AF AE AD AC AB AA A9 A8

IEN0* Interrupt enable 0 A8H EA EWDRT EBO ES/ESR ET1 - ET0 - 00 0000 0000

Bit address EF EE ED EC EB EA E9 E8

IEN1* Interrupt enable 1 E8H - EST - - ESPI EC EKBI - 00

[1]

00x0 0000

Bit address BF BE BD BC BB BA B9 B8

IP0* Interrupt priority 0 B8H - PWDRT PBO PS/PSR PT1 - PT0 - 00

[1]

x000 0000

IP0H Interrupt priority 0 high B7H - PWDRT

PBOH PSH/

PSRH

PT1H - PT0H - 00

[1]

x000 0000

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Product data sheet Rev. 05 — 28 September 2007 21 of 66

NXP Semiconductors

P89LPC912/913/914

8-bit microcontrollers with two-clock 80C51 core

Bit address FF FE FD FC FB FA F9 F8

IP1* Interrupt priority 1 F8H - PST - - PSPI PC PKBI - 00

[1]

00x0 0000

IP1H Interrupt priority 1 high F7H - PSTH - - PSPIH PCH PKBIH - 00

[1]

00x0 0000

KBCON Keypad control register 94H ------PATN

_SEL

KBIF 00

[1]

xxxx xx00

KBMASK Keypad interrupt mask

86H 00 0000 0000

KBPATN Keypad pattern register 93H FF 1111 1111

Bit address 87 86 85 84 83 82 81 80

P0* Port 0 80H CMP1/

KB6

CMPREF

/ KB5

CIN1A/

KB4

CIN2A/

KB2

[1]

Bit address 97 96 95 94 93 92 91 90

P1* Port 1 90H

RST RXD TXD

[1]

Bit address A7 A6 A5 A4 A3 A2 A1 A0

P2* Port 2 A0H SPICLK MISO MOSI

[1]

Bit address B7 B6 B5 B4 B3 B2 B1 B0

P3* Port 3 B0H XTAL1 XTAL2

[1]

P0M1 Port 0 output mode 1 84H (P0M1.6) (P0M1.5) (P0M1.4) (P0M1.2) FF 1111 1111

P0M2 Port 0 output mode 2 85H (P0M2.6) (P0M2.5) (P0M2.4) (P0M2.2) 00 0000 0000

P1M1 Port 1 output mode 1 91H (P1M1.1) (P1M1.0) D3

[1]

11x1 xx11

P1M2 Port 1 output mode 2 92H (P1M2.1) (P1M2.0) 00

[1]

00x0 xx00

P2M1 Port 2 output mode 1 A4H (P2M1.5) (P2M1.3) (P2M1.2) FF 1111 1111

P2M2 Port 2 output mode 2 A5H (P2M2.5) (P2M2.3) (P2M2.2) 00 0000 0000

P3M1 Port 3 output mode 1 B1H (P3M1.1) (P3M1.0) 03

[1]

xxxx xx11

P3M2 Port 3 output mode 2 B2H (P3M2.1) (P3M2.0) 00

[1]

xxxx xx00

PCON Power control register 87H SMOD1 SMOD0 BOPD BOI GF1 GF0 PMOD1 PMOD0 00 0000 0000

PCONA Power control register A B5H RTCPD - VCPD - - SPPD SPD - 00

[1]

0000 0000

Table 8. P89LPC913 Special function registers

…continued

* indicates SFRs that are bit addressable.

Name Description SFR

addr.

Bit functions and addresses Reset value

MSB LSB Hex Binary

P1-P3 P4-P6 P7-P9 P10-P12 P13-P15 P16-P18 P19-P21 P22-P24 P25-P27 P28-P30 P31-P33 P34-P36 P37-P39 P40-P42 P43-P45 P46-P48 P49-P51 P52-P54 P55-P57 P58-P60 P61-P63 P64-P66

P89LPC914FDH,129

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Manufacturer:

NXP Semiconductors

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IC MCU 8BIT 1KB FLASH 14TSSOP

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P89LPC914FDH,129

P89LPC914FDH,129

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