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PCF8563TS/4,118

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24P25-P27P28-P30P31-P33P34-P36P37-P39P40-P42P43-P45
PCF8563 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2015. All rights reserved.
Product data sheet Rev. 11 — 26 October 2015 13 of 45
NXP Semiconductors
PCF8563
Real-time clock/calendar
After this read/write access is completed, the time circuit is released again and any
pending request to increment the time counters that occurred during the read access is
serviced. A maximum of 1 request can be stored; therefore, all accesses must be
completed within 1 second (see Figure 8
).
As a consequence of this method, it is very important to make a read or write access in
one go, that is, setting or reading seconds through to years should be made in one single
access. Failing to comply with this method could result in the time becoming corrupted.
As an example, if the time (seconds through to hours) is set in one access and then in a
second access the date is set, it is possible that the time may increment between the two
accesses. A similar problem exists when reading. A roll over may occur between reads
thus giving the minutes from one moment and the hours from the next.
Recommended method for reading the time:
1. Send a START condition and the slave address for write (A2h).
2. Set the address pointer to 2 (VL_seconds) by sending 02h.
3. Send a RESTART condition or STOP followed by START.
4. Send the slave address for read (A3h).
5. Read VL_seconds.
6. Read Minutes.
7. Read Hours.
8. Read Days.
9. Read Weekdays.
10. Read Century_months.
11. Read Years.
12. Send a STOP condition.
8.6 Alarm registers
8.6.1 Register Minute_alarm
Fig 8. Access time for read/write operations
Table 18. Minute_alarm - minute alarm register (address 09h) bit description
Bit Symbol Value Place value Description
7 AE_M 0 - minute alarm is enabled
1
[1]
- minute alarm is disabled
6 to 4 MINUTE_ALARM 0 to 5 ten’s place minute alarm information coded in BCD
format
3 to 0 0 to 9 unit place
PCF8563 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2015. All rights reserved.
Product data sheet Rev. 11 — 26 October 2015 14 of 45
NXP Semiconductors
PCF8563
Real-time clock/calendar
[1] Default value.
8.6.2 Register Hour_alarm
[1] Default value.
8.6.3 Register Day_alarm
[1] Default value.
8.6.4 Register Weekday_alarm
[1] Default value.
8.6.5 Alarm flag
By clearing the alarm enable bit (AE_x) of one or more of the alarm registers, the
corresponding alarm condition(s) are active. When an alarm occurs, AF is set to logic 1.
The asserted AF can be used to generate an interrupt (INT
). The AF is cleared using the
interface.
The registers at addresses 09h through 0Ch contain alarm information. When one or
more of these registers is loaded with minute, hour, day or weekday, and its
corresponding AE_x is logic 0, then that information is compared with the current minute,
hour, day, and weekday. When all enabled comparisons first match, the alarm flag (AF in
register Control_2) is set to logic 1.
Table 19. Hour_alarm - hour alarm register (address 0Ah) bit description
Bit Symbol Value Place value Description
7 AE_H 0 - hour alarm is enabled
1
[1]
- hour alarm is disabled
6 - - - unused
5 to 4 HOUR_ALARM 0 to 2 ten’s place hour alarm information coded in BCD
format
3 to 0 0 to 9 unit place
Table 20. Day_alarm - day alarm register (address 0Bh) bit description
Bit Symbol Value Place value Description
7 AE_D 0 - day alarm is enabled
1
[1]
- day alarm is disabled
6 - - - unused
5 to 4 DAY_ALARM 0 to 3 ten’s place day alarm information coded in BCD
format
3 to 0 0 to 9 unit place
Table 21. Weekday_alarm - weekday alarm register (address 0Ch) bit description
Bit Symbol Value Description
7 AE_W 0 weekday alarm is enabled
1
[1]
weekday alarm is disabled
6 to 3 - - unused
2 to 0 WEEKDAY_ALARM 0 to 6 weekday alarm information
PCF8563 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2015. All rights reserved.
Product data sheet Rev. 11 — 26 October 2015 15 of 45
NXP Semiconductors
PCF8563
Real-time clock/calendar
The generation of interrupts from the alarm function is controlled via bit AIE. If bit AIE is
enabled, the INT
pin follows the condition of bit AF. AF will remain set until cleared by the
interface. Once AF has been cleared, it will only be set again when the time increments to
match the alarm condition once more. Alarm registers which have their AE_x bit at logic 1
are ignored.
8.7 Register CLKOUT_control and clock output
Frequencies of 32.768 kHz (default), 1.024 kHz, 32 Hz, and 1 Hz can be generated for
use as a system clock, microcontroller clock, input to a charge pump, or for calibration of
the oscillator.
[1] Default value.
(1) Only when all enabled alarm settings are matching.
It’s only on increment to a matched case that the alarm flag is set, see Section 8.6.5
.
Fig 9. Alarm function block diagram
013aaa088
WEEKDAY ALARM
AEN_W
WEEKDAY TIME
=
DAY ALARM
AEN_D
DAY TIME
=
HOUR ALARM
AEN_H
HOUR TIME
=
MINUTE ALARM
AEN_M
MINUTE TIME
=
check now signal
set alarm flag AF
(1)
AEN_M = 1
1
0
example
Table 22. CLKOUT_control - CLKOUT control register (address 0Dh) bit description
Bit Symbol Value Description
7 FE 0 the CLKOUT output is inhibited and CLKOUT output is
set high-impedance
1
[1]
the CLKOUT output is activated
6 to 2 - - unused
1 to 0 FD[1:0] frequency output at pin CLKOUT
00
[1]
32.768 kHz
01 1.024 kHz
10 32 Hz
11 1 Hz
P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24P25-P27P28-P30P31-P33P34-P36P37-P39P40-P42P43-P45

PCF8563TS/4,118

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Buy PCF8563TS/4,118
Manufacturer:
NXP Semiconductors
Description:
Real Time Clock ULTRA LOW PWR CLOCK RTC IC
Lifecycle:
New from this manufacturer.
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